参数资料
型号: AD8027ARZ-REEL7
厂商: Analog Devices Inc
文件页数: 15/25页
文件大小: 0K
描述: IC OPAMP R-R LDIST LN LP 8SOIC
标准包装: 1,000
放大器类型: 电压反馈
电路数: 1
输出类型: 满摆幅
转换速率: 100 V/µs
-3db带宽: 190MHz
电流 - 输入偏压: 4µA
电压 - 输入偏移: 200µV
电流 - 电源: 6.5mA
电流 - 输出 / 通道: 120mA
电压 - 电源,单路/双路(±): 2.7 V ~ 12 V,±1.35 V ~ 6 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SO
包装: 带卷 (TR)
AD8027/AD8028
Rev. C | Page 21 of 24
APPLICATIONS
USING THE SELECT PIN
The AD8027/AD8028’s unique SELECT pin has two functions:
The power-down function places the AD8027/AD8028 into
low power consumption mode. In power-down mode, the
amplifiers draw 450 μA (typical) of supply current.
The second function, as mentioned in the Theory of
Operation section, shifts the crossover point (where the
NPN/PNP input differential pairs transition from one to the
other) closer to either the positive supply rail or the negative
supply rail. This selectable crossover point allows the user to
minimize distortion based on the input signal and environ-
ment. The default state is 1.2 V from the positive power
supply, with the SELECT pin left floating or in three-state.
Table 6 lists the SELECT pin’s required voltages and modes.
Table 6. SELECT Pin Mode Control
SELECT Pin Voltage (V)
Mode
VS = ±5 V
VS = +5 V
VS = +3 V
Disable
5 to 4.2
0 to 0.8
Crossover Referenced
–1.2 V to Positive
Supply
4.2 to
3.3
0.8 to 1.7
Crossover Referenced
+1.2 V to Negative
Supply
3.3 to +5
1.7 to 5.0
1.7 to 3.0
When the input stage transitions from one input differential
pair to the other, there is virtually no noticeable change in the
output waveform.
The disable time of the AD8027/AD8028 amplifiers is load-
dependent. Typical data is presented in Table 7. See Figure 52
and Figure 53 for the actual switching measurements.
Table 7. DISABLE Switching Speeds
Supply Voltages (RL = 1 kΩ)
Time
±5 V
+5 V
+3 V
tON
45 ns
50 ns
tOFF
980 ns
1100 ns
1150 ns
DRIVING A 16-BIT ADC
With the adjustable crossover distortion selection point and low
noise, the AD8028 is an ideal amplifier for driving or buffering
input signals into high resolution ADCs such as the AD7767, a
16-bit, 1 LSB INL, 1 MSPS differential ADC. Figure 60 shows
the typical schematic for driving the ADC. The AD8028 driving
the AD7677 offers performance close to non-rail-to-rail
amplifiers and avoids the need for an additional supply other
than the single 5 V supply already used by the ADC.
In this application, the SELECT pins are biased to avoid the
crossover region of the AD8028 for low distortion operation.
Summary test data for the schematic shown in Figure 60 is
listed in Table 8.
+5V
+
AD8028
ANALOG INPUT +
INPUT RANGE
(0.15V TO 2.65V)
SELECT
(OPEN)
SELECT
(OPEN)
+
ANALOG INPUT –
AD7677
+5V
16 BITS
15
Ω
15
Ω
2.7nF
4MHz LPF
2.7nF
0.1
μF
0.1
μF
AD8028
03327-A-059
Figure 60. Unity Gain Differential Drive
Table 8. ADC Driver Performance, fC = 100 kHz,
VOUT = 4.7 V p-p
Parameter
Measurement
Second Harmonic Distortion
–105 dB
Third Harmonic Distortion
–102 dB
THD
–102 dB
SFDR
+105 dBc
As shown in Figure 61, the AD8028 and AD7677 combination
offers excellent integral nonlinearity (INL).
CODE
0
16384
32768
49152
65536
–1.0
–0.5
0
0.5
1.0
INL
(
L
SB)
03327-A-060
Figure 61. Integral Nonlinearity
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