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| 型号： | AD8109ASTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/33页 |
| 文件大小： | 0K |
| 描述： | IC VIDEO CROSSPOINT SWIT 80LQFP |
| 标准包装： | 1 |
| 功能： | 视频交叉点开关 |
| 电路： | 1 x 8:8 |
| 电压电源： | 双电源 |
| 电压 - 电源，单路/双路(±)： | ±4.5 V ~ 5.5 V |
| 电流 - 电源： | 33mA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 80-LQFP |
| 供应商设备封装： | 80-LQFP（12x12） |
| 包装： | 托盘 |
| 产品目录页面： | 801 (CN2011-ZH PDF) |
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AD8108/AD8109
Rev. B | Page 18 of 32
THEORY OF OPERATION
The AD8108 (G = 1) and AD8109 (G = 2) share a common core
architecture consisting of an array of 64 transconductance (gm)
input stages organized as eight 8:1 multiplexers with a common
8-line analog input bus. Each multiplexer is basically a folded-
cascode, high impedance voltage feedback amplifier with eight
input stages. The input stages are NPN differential pairs whose
differential current outputs are combined at the output stage,
which contains the high impedance node, compensation and a
complementary emitter follower output buffer. In the AD8108,
the output of each multiplexer is fed back directly to the
inverting inputs of its eight gm stages. In the AD8109, the
feedback network is a voltage divider consisting of two equal
resistors.
This switched-gm architecture results in a low power crosspoint
switch that is able to directly drive a back terminated video load
(150 ) with low distortion (differential gain and differential
phase errors are better than 0.02% and 0.02°, respectively). This
design also achieves high input resistance and low input
capacitance without the signal degradation and power
dissipation of additional input buffers. However, the small input
bias current at any input will increase almost linearly with the
number of outputs programmed to that input.
The output disable feature of these crosspoints allows larger
switch matrices to be built by simply busing together the
outputs of multiple 8 × 8 ICs. However, while the disabled
output impedance of the AD8108 is very high (10 M), that of
the AD8109 is limited by the resistive feedback network (which
has a nominal total resistance of 1 k) that appears in parallel
with the disabled output. If the outputs of multiple AD8109s are
connected through separate back termination resistors, the
loading due to these finite output impedances will lower the
effective back termination impedance of the overall matrix.
This problem is eliminated if the outputs of multiple AD8109s
are connected directly and share a single back termination
resistor for each output of the overall matrix. This configuration
increases the capacitive loading of the disabled AD8109s on the
output of the enabled AD8109.
APPLICATIONS
The AD8108/AD8109 have two options for changing the
programming of the crosspoint matrix. In the first, a serial word
of 32 bits can be provided that will update the entire matrix
each time. The second option allows for changing a single
output’s programming via a parallel interface. The serial option
requires fewer signals, but requires more time (clock cycles) for
changing the programming, while the parallel programming
technique requires more signals, but can change a single output
at a time and requires fewer clock cycles to complete
programming.
Serial Programming
The serial programming mode uses the device pins CE, CLK,
DATA IN, UPDATE, and SER/PAR. The first step is to assert a
low on SER/PAR to enable the serial programming mode. CE
for the chip must be low to allow data to be clocked into the
device. The CE signal can be used to address an individual
device when devices are connected in parallel.
The UPDATE signal should be high during the time that data is
shifted into the device’s serial port. Although the data will still
shift in when UPDATE is low, the transparent, asynchronous
latches will allow the shifting data to reach the matrix. This will
cause the matrix to try to update to every intermediate state as
defined by the shifting data.
The data at DATA IN is clocked in at every down edge of CLK.
A total of 32 data bits must be shifted in to complete the
programming. For each of the eight outputs, there are three bits
(D0 to D2) that determine the source of its input followed by
one bit (D3) that determines the enabled state of the output. If
D3 is low (output disabled), the three associated bits (D0 to D2)
do not matter because no input will be switched to that output.
The most significant output address data is shifted in first and is
followed in sequence until the least significant output address
data is shifted in. At this point, UPDATE can be taken low,
which will cause the programming of the device according to
the data that was just shifted in. The UPDATE registers are
asynchronous, and when UPDATE is low, they are transparent.
If more than one AD8108/AD8109 device is to be serially
programmed in a system, the DATA OUT signal from one device
can be connected to the DATA IN of the next device to form a
serial chain. All of the CLK, CE, UPDATE, and SER/PAR pins
should be connected in parallel and operated as described above.
The serial data is input to the DATA IN pin of the first device of
the chain, and it will ripple on through to the last. Therefore,
the data for the last device in the chain should come at the
beginning of the programming sequence. The length of the
programming sequence will be 32 times the number of devices
in the chain.
Parallel Programming
While using the parallel programming mode, it is not necessary
to reprogram the entire device when making changes to the
matrix. In fact, parallel programming allows the modification of
a single output at a time. Since this takes only one
CLK/UPDATE cycle, significant time savings can be realized by
using parallel programming.
One important consideration in using parallel programming is
that the RESET signal does not reset all registers in the
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD8109ASTZ | 制造商:Analog Devices 功能描述:Analog Crosspoint Switch IC |
| AD8109ASTZ2 | 制造商:AD 制造商全称:Analog Devices 功能描述:325 MHz, 8 ?? 8 Buffered Video Crosspoint Switches |
| AD8109-EB | 制造商:Analog Devices 功能描述:Evaluation Board For IC Video Cross PT 250MHz 8X8 制造商:Analog Devices 功能描述:VID CROSSPT 250MHZ 8X8 - Bulk 制造商:Rochester Electronics LLC 功能描述:AD8109 EVALUATION BOARD - Bulk |
| AD810ACHIPS | 制造商:Analog Devices 功能描述: |
| AD810AN | 功能描述:IC CURR-FDBK AMP VIDEO LP 8-DIP RoHS:否 类别:集成电路 (IC) >> 线性 - 放大器 - 视频放大器和频缓冲器 系列:- 标准包装:1,000 系列:- 应用:驱动器 输出类型:差分 电路数:3 -3db带宽:350MHz 转换速率:1000 V/µs 电流 - 电源:14.5mA 电流 - 输出 / 通道:60mA 电压 - 电源，单路/双路(±):5 V ~ 12 V，±2.5 V ~ 6 V 安装类型:表面贴装 封装/外壳:20-VFQFN 裸露焊盘 供应商设备封装:20-QFN 裸露焊盘（4x4） 包装:带卷 (TR) |
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