参数资料
型号: AD8555ACPZ-REEL7
厂商: Analog Devices Inc
文件页数: 16/28页
文件大小: 0K
描述: IC AMP CHOPPER 2MHZ 10MA 16LFCSP
标准包装: 1
系列: DigiTrim®
放大器类型: 断路器(零漂移)
电路数: 1
转换速率: 1.2 V/µs
增益带宽积: 2MHz
电流 - 输入偏压: 16nA
电压 - 输入偏移: 2µV
电流 - 电源: 2mA
电流 - 输出 / 通道: 10mA
电压 - 电源,单路/双路(±): 2.7 V ~ 5.5 V
工作温度: -40°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-VQFN 裸露焊盘,CSP
供应商设备封装: 16-LFCSP-VQ
包装: 标准包装
产品目录页面: 771 (CN2011-ZH PDF)
其它名称: AD8555ACPZ-REEL7DKR
AD8555
Rev. A | Page 23 of 28
After the second stage gain, first stage gain, and output offset
have been programmed, DAT_SUM should be computed and
the parity bit should be set equal to DAT_SUM. If DAT_SUM is
0, the parity fuse should not be blown in order for the PFUSE
signal to be 0. If DAT_SUM is 1, the parity fuse should be
blown to set the PFUSE signal to 1. The code to blow the parity
fuse is
1000 0000 0001 10 11 10 0000 0100 0111 1111 1110.
After setting the parity bit, the master fuse can be blown to pre-
vent further programming, using the code 1000 0000 0001 10
11 10 0000 0001 0111 1111 1110.
Signal PAR_SUM is the output of the 2-input exclusive-OR
gate (Cell EOR2). After the master fuse has been blown,
PARITY_ERROR is set to PAR_SUM. As mentioned earlier,
the AD8555 behaves as a programmed amplifier when
PARITY_ERROR = 0 (no parity error). On the other hand,
VOUT is connected to VSS when a parity error has been
detected, i.e., when PARITY_ERROR = 1.
Read Mode
The values stored by the polysilicon fuses can be sent to the
FILT/DIGOUT pin to verify correct programming. Normally,
the FILT/DIGOUT pin is connected to only the second gain
stage output via RF. During read mode, however, the
FILT/DIGOUT pin is also connected to the output of a shift
register to allow the polysilicon fuse contents to be read. Since
VOUT is a buffered version of FILT/DIGOUT, VOUT also out-
puts a digital signal during read mode.
Read mode is entered by setting Field 1 to 11 and selecting the
desired parameter in Field 2; Field 4 is ignored. The parameter
value, stored in the polysilicon fuses, is loaded into an internal
shift register, and the MSB of the shift register is connected to
the FILT/DIGOUT pin. Pulses at DIGIN shift the shift register
contents out to the FILT/DIGOUT pin, allowing the 8bit
parameter value to be read after seven additional pulses; shift-
ing occurs on the falling edge of DIGIN. An eighth pulse at
DIGIN disconnects FILT/DIGOUT from the shift register and
terminates the read mode. If a parameter value is less than 8 bits
long, the MSBs of the shift register are padded with 0s.
For example, to read the second stage gain, the code 1000 0000
0001 11 00 10 0000 0000 0111 1111 1110 can be used. Since the
second stage gain parameter value is only three bits long, the
FILT/DIGOUT pin has a value of 0 when this code is entered
and remains 0 during four additional pulses at DIGIN. The
fifth, sixth, and seventh pulse at DIGIN returns the 3-bit value
at FILT/DIGOUT, the seventh pulse returning the LSB. An
eighth pulse at DIGIN terminates the read mode.
Sense Current
A sense current is sent across each polysilicon fuse to determine
whether it has been blown or not. When the voltage across the
fuse is less than approximately 1.5 V, the fuse is considered not
blown and Logic 0 is output from the OTP cell. When the vol-
tage across the fuse is greater than approximately 1.5 V, the fuse
is considered blown and Logic 1 is output.
When the AD8555 is manufactured, all fuses have a low resis-
tance. When a sense current is sent through the fuse, a voltage
less than 0.1 V is developed across the fuse. This is much lower
than 1.5 V, so Logic 0 is output from the OTP cell. When a fuse
is electrically blown, it should have a very high resistance.
When the sense current is applied to the blown fuse, the voltage
across the fuse should be larger than 1.5 V, so Logic 1 is output
from the OTP cell.
It is theoretically possible (though very unlikely) for a fuse
to be incompletely blown during programming, assuming the
required conditions are met. In this situation, the fuse could
have a medium resistance (neither low nor high), and a voltage
of approximately 1.5 V could be developed across the fuse.
Thus, the OTP cell could sometimes output Logic 0 or a Logic
1, depending on temperature, supply voltage, and other va-
riables. To detect this undesirable situation, the sense current
can be lowered by a factor of 4 using a special code. The voltage
developed across the fuse would then change from 1.5 V to 0.38
V, and the output of the OTP would be a Logic 0 instead of the
Logic 1 expected from a blown fuse. Correctly blown fuses
would still output a Logic 1. In this way, incorrectly blown fuses
can be detected. Another special code would return the sense
current to the normal (larger) value. The sense current cannot
be permanently programmed to the low value. When the
AD8555 is powered up, the sense current defaults to the high
value.
The code to use the low sense current is 1000 0000 0001 00 00
10 XXXX XXX1 0111 1111 1110.
The code to use the normal (high) sense current is 1000 0000
0001 00 00 10 XXXX XXX0 0111 1111 1110.
相关PDF资料
PDF描述
TSW-109-08-G-S-RA CONN HEADER 9POS .100 SGL R/A AU
AWH30A-0202-T-R CONN HEADER 30POS RT ANG GOLD
TSW-122-07-T-S CONN HEADER 22POS .100" SNGL TIN
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