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参数资料
| 型号： | AD9243ASZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 5/24页 |
| 文件大小： | 0K |
| 描述： | IC ADC 14BIT 3MSPS 44-MQFP |
| 标准包装： | 1 |
| 位数： | 14 |
| 采样率（每秒）： | 3M |
| 数据接口： | 并联 |
| 转换器数目： | 7 |
| 功率耗散（最大）： | 145mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 44-QFP |
| 供应商设备封装： | 44-MQFP（10x10） |
| 包装： | 托盘 |
| 输入数目和类型： | 2 个单端，单极；1 个差分，单极 |
AD9243
REV. A
–13–
DC Coupling with Op Amps
Applications that require dc coupling can also benefit by driving
the AD9243 differentially. Since the signal swing requirements
of each input is reduced by a factor of two in the differential
mode, the AD9243 can be configured for a 5 V input span in a
+5 V or
±5 V system. This allows various high performance op
amps specified for +5 V and
±5 V operation to be configured in
various differential driver topologies. The optimum op amp
driver topology depends on whether the common-mode voltage
of the single-ended-input signal requires level-shifting.
Figure 30 shows a cross-coupled differential driver circuit best
suited for systems in which the common-mode signal of the
input is already biased to approximately midsupply (i.e., 2.5 V).
The common-mode voltage of the differential output is set by
the voltage applied to the “+” input of A2. The closed loop
gain of this symmetrical driver can be easily set by RIN and RF.
For more insight into the operation of this cross-coupled driver,
please refer to the AD8042 data sheet.
VINA
VINB
CML
AD9243
0.1 F
1k
RIN
1k
VIN
VCML–VIN
AVDD/2
VCML+VIN
AD8042
33
CF*
*OPTIONAL NOISE/BAND LIMITING CAPACITOR
RF
1k
Figure 30. Cross-Coupled Differential Driver
The driver circuit shown in Figure 31 is best suited for systems
in which the bipolar input signal is referenced to AGND and
requires proper level shifting. This driver circuit provides the
ability to level-shift the input signal to within the common-
mode range of the AD9243. The two op amps are configured as
matched difference amplifiers with the input signal applied to
opposing inputs to provide the differential output. The common-
mode offset voltage is applied to the noninverting resistor net-
work which provides the proper level shifting. The circuit also
employs optional diodes and pull-up resistors which may help
improve the op amps’ distortion performance by reducing their
headroom requirements. Rail-to-rail output amplifiers like the
AD8042 have sufficient headroom and thus do not require
these optional components.
VINA
VINB
CML
AD9243
390
VIN
VCML–VIN
VCML+VIN
AVDD
390
AVDD
390
AD8047
2.5k
33
100
0.1 F
1 F
0.1 F
OP113
33
390
Figure 31. Differential Driver with Level-Shifting
SINGLE-ENDED MODE OF OPERATION
The AD9243 can be configured for single-ended operation
using dc or ac coupling. In either case, the input of the A/D
must be driven from an operational amplifier that will not de-
grade the A/D’s performance. Because the A/D operates from a
single supply, it will be necessary to level shift ground-based
bipolar signals to comply with its input requirements. Both dc
and ac coupling provide this necessary function, but each
method results in different interface issues which may influence
the system design and performance.
DC COUPLING AND INTERFACE ISSUES
Many applications require the analog input signal to be dc
coupled to the AD9243. An operational amplifier can be con-
figured to rescale and level shift the input signal so that it is
compatible with the selected input range of the A/D. The input
range to the A/D should be selected on the basis of system
performance objectives as well as the analog power supply
availability since this will place certain constraints on the op
amp selection.
Many of the new high performance op amps are specified for
only
±5 V operation and have limited input/output swing capa-
bilities. Hence, the selected input range of the AD9243 should
be sensitive to the headroom requirements of the particular op
amp to prevent clipping of the signal. Also, since the output of
a dual supply amplifier can swing below –0.3 V, clamping its
output should be considered in some applications.
In some applications, it may be advantageous to use an op amp
specified for single supply +5 V operation since it will inher-
ently limit its output swing to within the power supply rails.
Rail-to-rail output amplifiers such as the AD8041 allow the
AD9243 to be configured with larger input spans which im-
proves the noise performance.
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相关代理商/技术参数 |
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| AD9243ASZRL | 功能描述:IC ADC 14BIT SGL 3MSPS 44MQFP RoHS:是 类别:集成电路 (IC) >> 数据采集 - 模数转换器 系列:- 标准包装:1,000 系列:- 位数:12 采样率（每秒）:300k 数据接口:并联 转换器数目:1 功率耗散（最大）:75mW 电压电源:单电源 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:24-SOIC（0.295"，7.50mm 宽） 供应商设备封装:24-SOIC 包装:带卷 (TR) 输入数目和类型:1 个单端，单极；1 个单端，双极 |
| AD9243EB | 制造商:AD 制造商全称:Analog Devices 功能描述:Complete 14-Bit, 3.0 MSPS Monolithic A/D Converter |
| AD9243-EB | 制造商:Analog Devices 功能描述:Evaluation Board For AD9243 制造商:Analog Devices 功能描述:DEV TOOLS, EVAL BD FOR AD9243 - Bulk |
| AD9244 | 制造商:AD 制造商全称:Analog Devices 功能描述:14-Bit, 40/65 MSPS Monolithic A/D Converter |
| AD9244_05 | 制造商:AD 制造商全称:Analog Devices 功能描述:14-Bit, 40 MSPS/65 MSPS A/D Converter |
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