- 您现在的位置：买卖IC网 > PDF目录10068 > AD9262BCPZRL7-5 (Analog Devices Inc)IC ADC 16BIT 5MHZ 64LFCSP PDF资料下载
参数资料
| 型号： | AD9262BCPZRL7-5 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 16/32页 |
| 文件大小： | 0K |
| 描述： | IC ADC 16BIT 5MHZ 64LFCSP |
| 设计资源： | Interfacing ADL5382 to AD9262 as an RF-to-Bits Solution (CN0062) |
| 标准包装： | 750 |
| 位数： | 16 |
| 采样率（每秒）： | 160M |
| 数据接口： | 串行，SPI? |
| 转换器数目： | 2 |
| 功率耗散（最大）： | 703mW |
| 电压电源： | 模拟和数字 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 64-LFCSP-VQ（9x9） |
| 包装： | 带卷 (TR) |
| 输入数目和类型： | 2 个单端，双极；1 个差分，单极 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页当前第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
AD9262
Rev. A | Page 23 of 32
Cascaded Filter Responses
The cascaded filter responses for the three signal bandwidth
settings are for a 160 MSPS output data rate, as shown in Figure 55,
0
102030
40506070
80
–160
–140
–120
–100
–80
–60
–40
–20
0
FREQUENCY (MHz)
AM
P
L
IT
UDE
(
d
BF
S
)
02
4
6
8
10
–0.08
–0.04
0
0.04
0.08
FREQUENCY (MHz)
0
77
72
-05
1
Figure 55. 10 MHz Signal Bandwidth, 160 MSPS
01
2
3
4
5
–0.08
–0.04
0
0.04
0.08
FREQUENCY (MHz)
0
102030
40506070
80
–160
–140
–120
–100
–80
–60
–40
–20
0
FREQUENCY (MHz)
AM
P
L
IT
UDE
(
d
BF
S
)
0
77
72
-05
2
Figure 56. 5 MHz Signal Bandwidth, 160 MSPS
0.5
1.5
2.5
–0.08
–0.04
0
0.04
0.08
FREQUENCY (MHz)
0
102030
40506070
80
–160
–140
–120
–100
–80
–60
–40
–20
0
FREQUENCY (MHz)
AM
P
L
IT
UDE
(
d
BF
S
)
0
77
72
-05
3
Figure 57. 2.5 MHz Signal Bandwidth, 160 MSPS
DC AND QUADRATURE ERROR CORRECTION (QEC)
In direct conversion or other quadrature systems, mismatches
between the real (I) and imaginary (Q) signal paths cause
frequencies in the positive spectrum to image into the negative
spectrum and vice versa. From an RF point of view, this is
equivalent to information above the LO frequency interfering
with information below the LO frequency, and vice versa. These
mismatches may occur from gain and/or phase mismatches in
the analog quadrature demodulator or in any components in
the ADC signal chain itself. In a single-carrier zero-IF system
where the carrier has been placed symmetrically around dc, this
causes self-distortion of the carrier as the two sidebands fold
onto one another and degrade the EVM of the signal.
In a multicarrier communication system, this can be even more
problematic because carriers of widely different power levels
can interfere with one another. For example, a large carrier
centered at +f1 can have an image appear at –f1 that can be
larger than the desired carrier at this frequency.
The integrated quadrature error correction (QEC) algorithm of
the AD9262 attempts to measure and correct the amplitude and
phase imbalances of the I and Q signal paths to achieve higher
levels of image suppression than is achievable by analog means
alone. These errors can be corrected in an adapted manner
where the I and Q gain and quadrature phase mismatches are
constantly estimated and corrected. This allows changes in the
mismatches due to slow supply and temperature changes to be
constantly tracked.
The quadrature errors are corrected in a frequency independent
manner on the AD9262; therefore, systems with significant
mismatch in the baseband chain may have reduced image
suppression. The AD9262 QEC still corrects the systematic
imbalances.
The convergence time of the QEC algorithm is dependent on
the statistics of the input signal. For large signals and large
imbalance errors, this convergence time is typically less than
two million samples of the AD9262 output data rate.
LO Leakage (DC) Correction
In a direct conversion receiver subsystem, LO to RF leakage of
the quadrature modulator shows up as dc offsets at baseband.
These offsets are added to dc offsets in the baseband signal
paths, and both contribute to a carrier at dc. In a zero-IF receiver,
this dc energy can cause problems because it appears in band of
a desired channel. As part of the AD9262 QEC function, the dc
offset is suppressed by applying a low frequency notch filter to
form a null around dc. The 3 dB bandwidth of this notch filter
vs. the AD9262 output data rates is shown in Figure 58.
相关PDF资料 |
PDF描述 |
|---|---|
| MS27473P16B35S | CONN PLUG 55POS STRAIGHT W/SCKT |
| IDT72V235L15PFI8 | IC FIFO SYNC 2048X18 15NS 64TQFP |
| LT1331CG#PBF | IC TXRX 5V/3V RS232 28-SSOP |
| IDT72V235L10PFG8 | IC FIFO SYNC 2048X18 10NS 64TQFP |
| AD9432BSTZ-80 | IC ADC 12BIT 80MSPS 52-LQFP |
相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9262-EBZ | 制造商:Analog Devices 功能描述:Evaluation Board For AD9262BCPZ 制造商:Analog Devices 功能描述:16 BIT DUAL BANDWIDTH ADC EB - Boxed Product (Development Kits) 制造商:Analog Devices 功能描述:A/D Converter Eval. Board 制造商:Analog Devices 功能描述:A/D Converter Eval. Board; Silicon Manufacturer:Analog Devices; Silicon Core Number:AD9262; Kit Application Type:Data Converter; Application Sub Type:ADC; Kit Contents:Software, Evaluation Board |
| AD9265 | 制造商:AD 制造商全称:Analog Devices 功能描述:16-Bit, 125 MSPS/105 MSPS/80 MSPS 1.8 V Analog-to-Digital Converter |
| AD9265-105EBZ | 功能描述:数据转换 IC 开发工具 16 Bit 105 Msps high SNR 1.8 RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
| AD9265-125EBZ | 功能描述:数据转换 IC 开发工具 16 Bit 125 Msps high SNR 1.8 RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
| AD9265-80EBZ | 功能描述:数据转换 IC 开发工具 16 Bit 80 Msps high SNR 1.8 RoHS:否 制造商:Texas Instruments 产品:Demonstration Kits 类型:ADC 工具用于评估:ADS130E08 接口类型:SPI 工作电源电压:- 6 V to + 6 V |
发布紧急采购，3分钟左右您将得到回复。