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参数资料
| 型号： | AD9572ACPZPEC-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 17/20页 |
| 文件大小： | 0K |
| 描述： | IC PLL CLOCK GEN 25MHZ 40LFCSP |
| 标准包装： | 750 |
| 类型： | 时钟发生器，扇出配送，多路复用器 |
| PLL： | 是 |
| 输入： | 晶体 |
| 输出： | CMOS，LVDS，LVPECL |
| 电路数： | 1 |
| 比率 - 输入:输出： | 1:7 |
| 差分 - 输入:输出： | 无/是 |
| 频率 - 最大： | 156.25MHz |
| 除法器/乘法器： | 是/无 |
| 电源电压： | 2.97 V ~ 3.63 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 40-WFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 40-LFCSP-WQ（6x6） |
| 包装： | 带卷 (TR) |
AD9572
Rev. B | Page 6 of 20
CLOCK OUTPUTS
Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given
over full VS and TA (40°C to +85°C) variation.
Table 6.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
LVPECL CLOCK OUTPUTS
Output Frequency
156.25
MHz
Output High Voltage (VOH)
VS 1.24
VS 1.05
VS 0.83
V
Output Low Voltage (VOL)
VS 2.07
VS 1.87
VS 1.62
V
Output Differential Voltage (VOD)
700
825
950
mV
Duty Cycle
45
55
%
LVDS CLOCK OUTPUTS
Output Frequency
156.25
MHz
Differential Output Voltage (VOD)
250
350
475
mV
Delta VOD
25
mV
Output Offset Voltage (VOS)
1.125
1.25
1.375
V
Delta VOS
25
mV
Short-Circuit Current (ISA, ISB)
14
24
mA
Output shorted to GND
Duty Cycle
45
55
%
CMOS CLOCK OUTPUTS
Output Frequency
33.33
MHz
Output High Voltage (VOH)
VS 0.1
V
Sourcing 1.0 mA current
Output Low Voltage (VOL)
0.1
V
Sinking 1.0 mA current
Duty Cycle
42
58
%
TIMING CHARACTERISTICS
Typical (typ) is given for VS = 3.3 V ± 10%, TA = 25°C, unless otherwise noted. Minimum (min) and maximum (max) values are given
over full VS and TA (40°C to +85°C) variation.
Table 7.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
LVPECL
Termination = 200 Ω to 0 V; CLOAD = 0 pF; CAC = 100
nF; oscilloscope set to 50 Ω termination
Output Rise Time, tRP
480
625
810
ps
20% to 80%, measured differentially
Output Fall Time, tFP
480
625
810
ps
80% to 20%, measured differentially
LVDS
Termination = 100 Ω differential; CLOAD = 0 pF; CAC =
100 nF; oscilloscope set to 50 Ω termination
Output Rise Time, tRL
160
350
540
ps
20% to 80%, measured differentially
Output Fall Time, tFL
160
350
540
ps
80% to 20%, measured differentially
CMOS
Output Rise Time, tRC
0.25
0.50
2.5
ns
20% to 80%; termination = 50 Ω to 0 V; CLOAD = 5 pF;
CAC = 100 nF
Output Fall Time, tFC
0.25
0.70
2.5
ns
80% to 20%; termination = 50 Ω to 0 V; CLOAD = 5 pF;
CAC = 100 nF
Output Rise Time, tRC2
1.3
2.1
2.6
ns
20% to 80%; active probe measurement, Cprobe =
1 pF, Rprobe=20 k
Ω, C
LOAD
= 3.9 pF
Output Fall Time, tFC2
1.4
2.3
3.0
ns
80% to 20%; active probe measurement, Cprobe =
1 pF, Rprobe=20 k
Ω, C
LOAD
= 3.9 pF
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AD9572ACPZPEC-RL | 功能描述:IC PLL CLOCK GEN 25MHZ 40LFCSP RoHS:是 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:1,000 系列:Precision Edge® 类型:时钟/频率合成器 PLL:无 输入:CML，PECL 输出:CML 电路数:1 比率 - 输入:输出:2:1 差分 - 输入:输出:是/是 频率 - 最大:10.7GHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.6 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-VFQFN 裸露焊盘，16-MLF? 供应商设备封装:16-MLF?（3x3） 包装:带卷 (TR) 其它名称:SY58052UMGTRSY58052UMGTR-ND |
| AD9572-EVALZ-LVD | 制造商:AD 制造商全称:Analog Devices 功能描述:Fiber Channel/Ethernet Clock Generator IC, PLL Core, Dividers, 7 Clock Outputs |
| AD9572-EVALZ-PEC | 制造商:AD 制造商全称:Analog Devices 功能描述:Fiber Channel/Ethernet Clock Generator IC, PLL Core, Dividers, 7 Clock Outputs |
| AD9572XCPZLVD | 制造商:Analog Devices 功能描述: |
| AD9572XCPZPEC | 制造商:Analog Devices 功能描述: |
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