参数资料
型号: AD9953YSVZ
厂商: Analog Devices Inc
文件页数: 15/32页
文件大小: 0K
描述: IC DDS DAC 14BIT 400MSPS 48-TQFP
产品培训模块: Direct Digital Synthesis Tutorial Series (1 of 7): Introduction
Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action
Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter
Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction
Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter
Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator
标准包装: 1
分辨率(位): 14 b
主 fclk: 400MHz
调节字宽(位): 32 b
电源电压: 1.71 V ~ 1.96 V
工作温度: -40°C ~ 105°C
安装类型: 表面贴装
封装/外壳: 48-TQFP 裸露焊盘
供应商设备封装: 48-TQFP 裸露焊盘(7x7)
包装: 托盘
产品目录页面: 552 (CN2011-ZH PDF)
AD9953
Rev. A | Page 22 of 32
trol.
ter
utput signal is offset
y a constant angle relative to the nominal signal. This allows
put with some external
d meth
here the user regularly
tes the phas
port. By properly
ifying the ph
implement a pha
However, both the
of the I/O
rate at which pha
allo
f
hase accum
automatic zeroin
olled via th
phase
mulator bit.
holds the value t
tinuous Cle
he continuous clear bit is simply a static control signal that,
nt
s the
-off
d.
he
r value into the amplitude scale factor (ASF) register.
he shaped on-off keying function may be bypassed (disabled)
by clearing the OSK enable bit (CFR1<25> = 0).
e most signifi-
unction register (CFR). CFR1<25> is
e
tive
ode
Off Keying Mode Operation
termined
he OSK
all 0s
he DDS core output by 16383 (decimal).
nally generated scale factor step size
<15:14> bits. Table 8 describes the
e
ts of the amplitude
he user to ramp to a value less
PROGRAMMING AD9953 FEATURES
Phase Offset Control
A 14-bit phase offset (θ) may be added to the output of the phase
accumulator by means of the control registers. This feature
provides the user with two different methods of phase con
The first method is a static phase adjustment where a fixed
phase offset is loaded into the appropriate phase offset regis
and left unchanged. The result is that the o
b
the user to phase align the DDS out
a .
signal, if necess
The secon
ry
od of phase control is w
upda
e offset register via the I/O
mod
ase offset as a function of time, the user can
se modulated output signal.
speed
port and the frequency of SYSCLK limit the
se modulation can be performed.
The AD9953
ws for a programmable continuous zeroing o
the p
ulator as well as a clear and release or
g function. Each feature is individually
contr
e CFR1 bits. CFR1<13> is the automatic clear
accu
CFR1<10> clears the phase accumulator and
o zero.
Con
ar Bit
T
when active high, holds the phase accumulator at zero for the
entire time the bit is active. When the bit goes low, inactive, the
phase accumulator is allowed to operate.
Clear and Release Function
When set, the auto-clear phase accumulator clears and releases
the phase accumulator upon receiving an I/O UPDATE. The
automatic clearing function is repeated for every subseque
I/O UPDATE until the appropriate auto-clear control bit is
cleared.
Shaped On-Off Keying
The shaped on-off keying function of the AD9953 allow
user to control the ramp-up and ramp-down time of an on
emission from the DAC. This function is used in burst
transmissions of digital data to reduce the adverse spectral
impact of short, abrupt bursts of data.
Auto and manual shaped on-off keying modes are supporte
The auto mode generates a linear scale factor at a rate
determined by the amplitude ramp rate (ARR) register
controlled by an external pin (OSK). Manual mode allows t
user to directly control the output amplitude by writing the
scale facto
T
The modes are controlled by two bits located in th
cant byte of the control f
the shaped on-off keying enable bit. When CFR1<25> is set, th
output scaling function is enabled and CFR1<25> bypasses the
function. CFR1<24> is the internal shaped on-off keying ac
bit. When CFR1<24> is set, internal shaped on-off keying m
is active; CFR1<24> is cleared, external shaped on-off keying
mode is active. CFR1<24> is a Don’t Care if the shaped on-off
keying enable bit (CFR1<25>) is cleared. The power-up
condition is shaped on-off keying disabled (CFR1<25> = 0).
Figure 20 shows the block diagram of the OSK circuitry.
AUTO Shaped On-
The auto shaped on-off keying mode is active when CFR1<25>
and CFR1<24> are set. When auto shaped on-off keying mode
is enabled, a single scale factor is internally generated and
applied to the multiplier input for scaling the output of the DDS
core block (see Figure 20). The scale factor is the output of a
14-bit counter that increments/decrements at a rate de
by the contents of the 8-bit output ramp rate register. The scale
factor increases if the OSK pin is high and decreases if t
pin is low. The scale factor is an unsigned value such that
multiply the DDS core output by 0 (decimal) and 0x3FFF
multiplies t
For those users who use the full amplitude (14 bits) but need
fast ramp rates, the inter
is controlled via the ASF
increment/decrement step size of the internally generated scal
factor per the ASF<15:14> bits.
A special feature of this mode is that the maximum output
amplitude allowed is limited by the conten
scale factor register. This allows t
than full scale.
Table 8. Auto-Scale Factor Internal Step Size
ASF<15:14> (Binary)
Increment/Decrement Size
00
1
01
2
10
4
11
8
相关PDF资料
PDF描述
VE-2WX-IY-F4 CONVERTER MOD DC/DC 5.2V 50W
DS3174+ IC TXRX DS3/E3 QUAD 400-BGA
DS3173N IC TRPL DS3/E3 TXRX 400-PBGA
AD9830ASTZ IC DDS 10BIT 50MHZ CMOS 48-TQFP
VE-2WW-IY-F4 CONVERTER MOD DC/DC 5.5V 50W
相关代理商/技术参数
参数描述
AD9953YSVZ-REEL7 功能描述:IC DDS DAC 14BIT 1.8V 48TQFP RoHS:是 类别:集成电路 (IC) >> 接口 - 直接数字合成 (DDS) 系列:- 产品变化通告:Product Discontinuance 27/Oct/2011 标准包装:2,500 系列:- 分辨率(位):10 b 主 fclk:25MHz 调节字宽(位):32 b 电源电压:2.97 V ~ 5.5 V 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:16-TSSOP(0.173",4.40mm 宽) 供应商设备封装:16-TSSOP 包装:带卷 (TR)
AD9954 制造商:AD 制造商全称:Analog Devices 功能描述:400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer
AD9954/PCB 制造商:Analog Devices 功能描述:AD9954 400 MSPS DDS W/ 14 BIT DAC EVALBD - Bulk 制造商:Analog Devices 功能描述:EVALUATION KIT ((NS))
AD9954/PCBZ 功能描述:BOARD EVAL FOR 9954 RoHS:是 类别:编程器,开发系统 >> 评估演示板和套件 系列:AgileRF™ 标准包装:1 系列:PSoC® 主要目的:电源管理,热管理 嵌入式:- 已用 IC / 零件:- 主要属性:- 次要属性:- 已供物品:板,CD,电源
AD9954/PCBZ1 制造商:AD 制造商全称:Analog Devices 功能描述:400 MSPS, 14-Bit, 1.8 V CMOS, Direct Digital Synthesizer