参数资料
| 型号： | AD9979BCPZRL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 11/56页 |
| 文件大小： | 0K |
| 描述： | IC PROCESSOR CCD 14BIT 48-LFCSP |
| 标准包装： | 1 |
| 类型： | CCD 信号处理器，14 位 |
| 输入类型： | 逻辑 |
| 输出类型： | 逻辑 |
| 接口： | 3 线串口 |
| 电流 - 电源： | 48mA |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 48-LFCSP-VQ（7x7） |
| 包装： | 标准包装 |
| 其它名称： | AD9979BCPZRLDKR |
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AD9979
Rev. C | Page 19 of 56
Name
Length
Range
Description
HBLKTOGO1
13 bits
0 to 8191 pixel location
First HBLK toggle position for odd lines in HBLK Mode 0 and HBLK Mode 1.
HBLKTOGO2
13 bits
0 to 8191 pixel location
Second HBLK toggle position for odd lines in HBLK Mode 0 and HBLK Mode 1.
HBLKTOGO3
13 bits
0 to 8191 pixel location
Third HBLK toggle position for odd lines in HBLK Mode 0 and HBLK Mode 1.
HBLKTOGO4
13 bits
0 to 8191 pixel location
Fourth HBLK toggle position for odd lines in HBLK Mode 0 and HBLK Mode 1.
HBLKTOGO5
13 bits
0 to 8191 pixel location
Fifth HBLK toggle position for odd lines in HBLK Mode 0 and HBLK Mode 1.
HBLKTOGO6
13 bits
0 to 8191 pixel location
Sixth HBLK toggle position for odd lines in HBLK Mode 0 and HBLK Mode 1.
HBLKTOGE1
13 bits
0 to 8191 pixel location
First HBLK toggle position for even lines in HBLK Mode 0 and HBLK Mode 1.
HBLKTOGE2
13 bits
0 to 8191 pixel location
Second HBLK toggle position for even lines in HBLK Mode 0 and HBLK Mode 1.
HBLKTOGE3
13 bits
0 to 8191 pixel location
Third HBLK toggle position for even lines in HBLK Mode 0 and HBLK Mode 1.
HBLKTOGE4
13 bits
0 to 8191 pixel location
Fourth HBLK toggle position for even lines in HBLK Mode 0 and HBLK Mode 1.
HBLKTOGE5
13 bits
0 to 8191 pixel location
Fifth HBLK toggle position for even lines in HBLK Mode 0 and HBLK Mode 1
HBLKTOGE6
13 bits
0 to 8191 pixel location
Sixth HBLK toggle position for even lines in HBLK Mode 0 and HBLK Mode 1.
RAxHyREPz1
12 bits
0 to 15 HCLK pulses
HBLK Mode 2 even field Repeat Area x. Number of Hy repetitions for HBLKSTARTz
even lines.2
Bits[3:0]: number of Hy pulses following HBLKSTARTA.
Bits[7:4]: number of Hy pulses following HBLKSTARTB.
Bits[11:8]: number of Hy pulses following HBLKSTARTC.
HBLKSTARTA
13 bits
0 to 8191 pixel location
HBLK Repeat Area Start Position A for HBLK Mode 2.
HBLKSTARTB
13 bits
0 to 8191 pixel location
HBLK Repeat Area Start Position B for HBLK Mode 2.
HBLKSTARTC
13 bits
0 to 8191 pixel location
HBLK Repeat Area Start Position C for HBLK Mode 2.
HBLKALT_PATx3
3 bits
0 to 5 even repeat area
HBLK Mode 2 odd field Repeat Area x pattern. Selected from even field repeat areas.4
1 The variable x represents the repeat area, from 0 to 5. The variable y represents the horizontal driver, 1 or 2. The variable z represents the HBLK repeat area start
position for HBLK Mode 2, A, B, or C.
2 Odd lines defined using HBLKALT_PATx.
3 The variable x represents the repeat area, from 0 to 5.
4 Even lines defined using RAxHyREPz; also see Note 1.
HBLK
HBLK REPEATING PATTERN IS CREATED USING HBLKLEN AND HBLKREP REGISTERS.
H1/H3
H2/H4
HBLKSTART HBLKTOGE1
HBLKTOGE2
HBLKEND
HBLKTOGE3
HBLKTOGE4
HBLKLEN
HBLKREP NUMBER 1
HBLKREP NUMBER 2
HBLKREP NUMBER 3
HBLKREP = 3
05
95
7-
02
8
Figure 26. HBLK Repeating Pattern Using HBLK Mode 1 (Register Value = 1)
HBLK Mode 1 Operation
Multiple repeats of the HBLK signal can be enabled by setting
HBLKMODE to 1. In this mode, the HBLK pattern is generated
using a different set of registers: HBLKSTART, HBLKEND,
HBLKLEN, and HBLKREP, along with the six toggle positions
Generating HBLK Line Alternation
HBLK Mode 0 and HBLK Mode 1 provide the ability to alternate
HBLK toggle positions on even and odd lines for which separate
toggle positions are available. If even/odd line alternation is not
required, load the same values into the registers for the even
lines (HBLKTOGEx) as the odd (HBLKTOGOx) lines.
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| AD9980/PCBZ | 功能描述:KIT EVALUATION AD9980 RoHS:是 类别:编程器，开发系统 >> 评估演示板和套件 系列:Advantiv® 标准包装:1 系列:PCI Express® (PCIe) 主要目的:接口，收发器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要属性:- 次要属性:- 已供物品:板 |
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