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参数资料
| 型号： | ADAU1701JSTZ-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 19/53页 |
| 文件大小： | 0K |
| 描述： | IC AUDIO PROC 2ADC/4DAC 48-LQFP |
| 设计资源： | Analog Audio Input, Class-D Output with ADAU1701, SSM2306, and ADP3336 (CN0162) |
| 标准包装： | 2,000 |
| 系列： | SigmaDSP® |
| 类型： | 音频处理器 |
| 应用： | 车载，监视器，MP3 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-LQFP |
| 供应商设备封装： | 48-LQFP（7x7） |
| 包装： | 带卷 (TR) |
| 配用： | EVAL-ADAU1701MINIZ-ND - BOARD EVAL SIGMADSP AUD ADAU1701 |
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ADAU1701
Rev. B | Page 25 of 52
I2C Read and Write Operations
Figure 22 shows the timing of a single-word write operation.
Every ninth clock, the ADAU1701 issues an acknowledge by
pulling SDA low.
Figure 23 shows the timing of a burst mode write sequence.
This figure shows an example where the target destination
registers are two bytes. The ADAU1701 knows to increment
its subaddress register every two bytes because the requested
subaddress corresponds to a register or memory area with a
2-byte word length.
The timing of a single-word read operation is shown in
Figure 24. Note that the first R/W bit is 0, indicating a write
operation. This is because the subaddress still needs to be
written to set up the internal address. After the ADAU1701
acknowledges the receipt of the subaddress, the master must
issue a repeated start command followed by the chip address
byte with the R/W set to 1 (read). This causes the ADAU1701
SDA to reverse and begin driving data back to the master. The
master then responds every ninth pulse with an acknowledge
pulse to the ADAU1701.
Figure 25 shows the timing of a burst mode read sequence. This
figure shows an example where the target read registers are two
bytes. The ADAU1701 increments its subaddress every two bytes
because the requested subaddress corresponds to a register or
memory area with word lengths of two bytes. Other addresses
may have word lengths ranging from one to five bytes. The
ADAU1701 always decodes the subaddress and sets the auto-
increment circuit so that the address increments after the
appropriate number of bytes.
S = start bit
P = stop bit
AM = acknowledge by master
AS = acknowledge by slave
S
AS
SUBADDRESS
LOW
DATA BYTE 1
DATA BYTE 2
AS
P
DATA BYTE N
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
06
412
-0
22
Figure 22. Single Word I2C Write Format
S
AS
SUBADDRESS
LOW
DATA-
WORD 1,
BYTE 1
DATA-
WORD 1,
BYTE 2
DATA-
WORD 2,
BYTE 1
DATA-
WORD 2,
BYTE 2
AS
P
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
064
12-
02
3
Figure 23. Burst Mode I2C Write Format
S
AS
S
SUBADDRESS
LOW
AM
AS
DATA
BYTE 1
DATA
BYTE 2
DATA
BYTE N
P
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
CHIP ADDRESS,
R/W = 1
06
41
2-
024
Figure 24. Single-Word I2C Read Format
S
AS
S
SUBADDRESS
LOW
AM
AS
DATA-
WORD 1,
BYTE 1
AM
DATA-
WORD 1,
BYTE 2
P
SUBADDRESS
HIGH
CHIP ADDRESS,
R/W = 0
CHIP ADDRESS,
R/W = 1
0
64
12
-0
25
Figure 25. Burst Mode I2C Read Format
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADAU1701MINIBZ | 制造商:Analog Devices 功能描述:EVAL BD SIGMADSPMULTICHANAUDIO PROCESSOR - Bulk |
| ADAU1702 | 制造商:AD 制造商全称:Analog Devices 功能描述:SigmaDSP 28-56-Bit Audio Processor with Two ADCs and Four DACs |
| ADAU1702JSTZ | 功能描述:IC AUDIO PROC 2ADC/4DAC 48-LQFP RoHS:是 类别:集成电路 (IC) >> 线性 - 音频处理 系列:SigmaDSP® 其它有关文件:STA321 View All Specifications 标准包装:1 系列:Sound Terminal™ 类型:音频处理器 应用:数字音频 安装类型:表面贴装 封装/外壳:64-LQFP 裸露焊盘 供应商设备封装:64-LQFP EP（10x10） 包装:Digi-Reel® 其它名称:497-11050-6 |
| ADAU1702JSTZ-RL | 功能描述:IC AUDIO PROC 2ADC/4DAC 48-LQFP RoHS:是 类别:集成电路 (IC) >> 线性 - 音频处理 系列:SigmaDSP® 其它有关文件:STA321 View All Specifications 标准包装:1 系列:Sound Terminal™ 类型:音频处理器 应用:数字音频 安装类型:表面贴装 封装/外壳:64-LQFP 裸露焊盘 供应商设备封装:64-LQFP EP（10x10） 包装:Digi-Reel® 其它名称:497-11050-6 |
| ADAU1761 | 制造商:AD 制造商全称:Analog Devices 功能描述:SigmaDSP Stereo, Low Power, 96 kHz, 24-Bit Audio Codec with Integrated PLL |
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