参数资料
型号: ADAU1701JSTZ-RL
厂商: Analog Devices Inc
文件页数: 33/53页
文件大小: 0K
描述: IC AUDIO PROC 2ADC/4DAC 48-LQFP
设计资源: Analog Audio Input, Class-D Output with ADAU1701, SSM2306, and ADP3336 (CN0162)
标准包装: 2,000
系列: SigmaDSP®
类型: 音频处理器
应用: 车载,监视器,MP3
安装类型: 表面贴装
封装/外壳: 48-LQFP
供应商设备封装: 48-LQFP(7x7)
包装: 带卷 (TR)
配用: EVAL-ADAU1701MINIZ-ND - BOARD EVAL SIGMADSP AUD ADAU1701
ADAU1701
Rev. B | Page 38 of 52
2074 TO 2075 (0x081A TO 0x081B)—DATA
CAPTURE REGISTERS
The ADAU1701 data capture feature allows the data at any node
in the signal processing flow to be sent to one of two readable
registers. This feature is useful for monitoring and displaying
information about internal signal levels or compressor/limiter
activity.
For each of the data capture registers, a capture count and a
register select must be set. The capture count is a number
between 0 and 1023 that corresponds to the program step
number where the capture is to occur. The register select field
programs one of four registers in the DSP core that transfers
this information to the data capture register when the program
counter reaches this step.
The captured data is in 5.19, twos complement data format,
which comes from the internal 5.23 data-word with the four
LSBs truncated.
The data that must be written to set up the data capture is a
concatenation of the 10-bit program count index with the 2-bit
register select field. The capture count and register select values
that correspond to the desired point to be monitored in the
signal processing flow can be found in a file output from the
program compiler. The capture registers can be accessed by
reading from Location 2074 and Location 2075. The format for
writing and reading to the data capture registers is shown in
Table 43. Safeload Data Registers Bit Map
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Default
0
PC09
PC08
PC07
PC06
PC05
PC04
PC03
PC02
PC01
PC00
RS01
RS00
0x0000
Table 44.
Bit Name
Description
PC[9:0]
10-bit program counter address
RS[1:0]
Select the register to be transferred to the data capture output
RS[1:0]
Register
00
Multiplier X input (Mult_X_input)
01
Multiplier Y input (Mult_Y_input)
10
Multiplier-accumulator output (MAC_out)
11
Accumulator feedback (Accum_fback)
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