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参数资料
| 型号： | ADE7518ASTZF8-RL |
| 厂商： | Analog Devices Inc |
| 文件页数： | 116/128页 |
| 文件大小： | 0K |
| 描述： | IC ENERGY METER MCU 8K 64LQFP |
| 产品变化通告： | Product Discontinuance 27/Oct/2011 |
| 标准包装： | 1,500 |
| 输入阻抗： | * |
| 测量误差： | * |
| 电压 - 高输入/输出： | * |
| 电压 - 低输入/输出： | * |
| 电流 - 电源： | * |
| 电源电压： | * |
| 测量仪表类型： | * |
| 工作温度： | * |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 64-LQFP |
| 供应商设备封装： | 64-LQFP（10x10） |
| 包装： | 带卷 (TR) |
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ADE7518
SS (Slave Select Pin)
In SPI slave mode, a transfer is initiated by the assertion of SS
low. The SPI port then transmits and receives 8-bit data until
the data is concluded by the deassertion of SS according to the
SPICON bit setting. In slave mode, SS is always an input.
In SPI master mode, the SS can be used to control data transfer
to a slave device. In automatic slave select control mode, the SS
Figure 95 shows the SPI output for certain automatic chip select
and continuous mode selections. Note that if the continuous mode
is not used, a short delay is inserted between transfers.
SS
SCLK
AUTO_SS = 1
is asserted low to select the slave device and then raised to deselect
SPICONT = 1
DIN
DIN1
DIN2
the slave device after the transfer is complete. Automatic slave
select control is enabled by setting the AUTO_SS bit in the SPI
Configuration SFR 1 (SPIMOD1, 0xE8).
DOUT
DOUT1
DOUT2
In a multimaster system, the SS can be configured as an input so
that the SPI peripheral can operate as a slave in some situations
and as a master in others. In this case, the slave selects for the
slaves that are controlled by this SPI peripheral should be gener-
ated with general I/O pins.
AUTO_SS = 1
SS
SCLK
SPI MASTER OPERATING MODES
SPICONT = 0
DIN
DIN1
DIN2
The double-buffered receive and transmit registers can be used to
maximize the throughput of the SPI peripheral by continuously
streaming out data in master mode. Continuous transmit mode is
DOUT
DOUT1
DOUT2
designed to use the full capacity of the SPI. In this mode, the
master transmits and receives data until the SPI/I 2 C Transmit
Buffer SFR (SPI2CTx, 0x9A) is empty at the start of a byte
transfer. Continuous mode is enabled by setting the SPICONT bit
SS
SCLK
in the SPI Configuration SFR 2 (SPIMOD2, 0xE9). The SPI
peripheral also offers a single byte read/write function.
AUTO_SS = 0
SPICONT = 0
(MANUAL SS CONTROL)
DIN
DIN1
DIN2
In master mode, the type of transfer is handled automatically,
depending on the configuration of the SPICONT bit in the SPI
Configuration SFR 2 (SPIMOD2, 0xE9). The following proce-
dures show the sequence of events that should be performed for
DOUT
DOUT1
DOUT2
each master operating mode. Based on the SS configuration,
some of these events take place automatically.
Procedures for Using SPI as a Master
Single Byte Mode—SPICONT (SPIMOD2[7]) = 0
1. Write to SPI2CTx SFR.
2. SS is asserted low and a write routine is initiated.
Figure 95. Automatic Chip Select and Continuous Mode Output
Note that reading the content of the SPI/I 2 C Receive Buffer SFR
(SPI2CRx, 0x9B) should be done using a 2-cycle instruction set,
such as MOV A or SPI2CRX. Using a 3-cycle instruction, such
as MOV 0x3D or SPI2CRX, does not transfer the correct informa-
tion into the target register.
3.
4.
5.
SPITxIRQ interrupt flag is set when the SPI2CTx register
is empty.
SS is deasserted high.
Write to SPI2CTx SFR to clear the SPITxIRQ interrupt flag.
Continuous Byte Mode—SPICONT (SPIMOD2[7]) = 1
1.
2.
3.
4.
5.
6.
Write to SPI2CTx SFR.
SS is asserted low and write routine is initiated.
Wait for the SPITxIRQ interrupt flag to write to SPI2CTx
SFR. Transfer continues until the SPI2CTx register and
transmit shift registers are empty.
SPITxIRQ interrupt flag is set when the SPI2CTx register
is empty.
SS is deasserted high.
Write to SPI2CTx SFR to clear the SPITxIRQ interrupt flag.
Rev. 0 | Page 116 of 128
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