参数资料
| 型号： | ADM1025ARQZ-R7 |
| 厂商： | ON Semiconductor |
| 文件页数： | 8/19页 |
| 文件大小： | 0K |
| 描述： | IC MONITOR SYS/VOLT 5CH 16QSOP |
| 产品变化通告： | MFG CHG Notification ADI to ON Semi Product Obsolescence 11/Feb/2009 |
| 标准包装： | 1,000 |
| 应用： | PC，PDA |
| 接口： | I²C |
| 电源电压： | 3 V ~ 5.5 V |
| 封装/外壳： | 16-SSOP（0.154"，3.90mm 宽） |
| 供应商设备封装： | 16-QSOP |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
ADM1025, ADM1025A
http://onsemi.com
16
Table 12. REGISTER 41h STATUS REGISTER 1 (POWER-ON DEFAULT <7:0> = 00h)
Bit
Name
R/W
Description
0
+2.5V_Error
Read-only
A 1 indicates a high or low limit has been exceeded.
1
VCCP_Error
Read-only
A 1 indicates a high or low limit has been exceeded.
2
+3.3V_Error
Read-only
A 1 indicates a high or low limit has been exceeded.
3
+5V_Error
Read-only
A 1 indicates a high or low limit has been exceeded.
4
Local Temp Error
Read-only
A 1 indicates a high or a low temperature limit has been exceeded.
5
Remote Temp Error
Read-only
A 1 indicates a high or low Remote temperature limit has been exceeded.
6
Reserved
7
Reserved
Table 13. REGISTER 42h STATUS REGISTER 2 (POWER-ON DEFAULT <7:0> = 00h)
Bit
Name
R/W
Description
0
+12V_Error
Read-only
A 1 indicates a high or low limit has been exceeded.
1
VCC_Error
Read-only
A 1 indicates a high or low limit has been exceeded.
2
Reserved
Read-only
Undefined
3
Reserved
Read-only
Undefined
4
Reserved
Read-only
Undefined
5
Reserved
Read-only
Undefined
6
Remote Diode Fault
Read-only
A one indicates either a short or open circuited fault on the remote thermal
diode inputs.
7
Reserved
Read-only
Undefined
Table 14. REGISTER 47h VID REGISTER (POWER-ON DEFAULT = 0000 (VID [3:0]))
Bit
Name
R/W
Description
03
VID[0:3]
Read-only
The VID[3:0] inputs from Pentium/PRO power supplies to indicate the
operating voltage (e.g., 1.3 V to 2.9 V).
45
Reserved
Read-only
Undefined
6
Offset Config
Read/Write
Configures offset register to be used with internal or external channel. If
Bit 0 of Test Register = 1 and Bit 7 of VID Register = 0, then setting this bit
to 1 configures the Offset Register to the internal temperature channel.
Clearing this bit configures the Offset Register to the external temperature
channel. (Default = 0.)
7
RST ENABLE
Read/Write
When set to 1, enables the RST output function on Pin 16. This bit defaults
to 0 on power-up. (RST Disabled.)
Table 15. REGISTER 49h VID4 REGISTER (POWER-ON DEFAULT = 1000 000 (VID4))
Bit
Name
R/W
Description
0
VID4
Read
VID4 Input (If Selected) (Defaults to 0)
17
Reserved
Read
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