参数资料
型号: ADM1068ASTZ
厂商: Analog Devices Inc
文件页数: 19/24页
文件大小: 0K
描述: IC SUPERVISOR/SEQUENCER 32-LQFP
标准包装: 1
系列: Super Sequencer®
类型: 序列发生器
监视电压数目: 8
输出: 可编程
电压 - 阀值: 8 种可选阀值组合
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-LQFP
供应商设备封装: 32-LQFP(7x7)
包装: 托盘
产品目录页面: 788 (CN2011-ZH PDF)
配用: EVAL-ADM1068LQEBZ-ND - BOARD EVALUATION FOR ADM1068LQ
ADM1068
SMBus
POWER-UP
(V CC > 2.5V)
EEPROM
E
E
P
R
O
M
L
D
DEVICE
CONTROLLER
D
A
T
A
LATCH A
R
A
M
L
D
U
P
D
LATCH B
FUNCTION
(OV THRESHOLD
ON VP1)
Figure 24. Configuration Update Flow Diagram
UPDATING THE SEQUENCING ENGINE
Sequencing engine (SE) functions are not updated in the same
way as regular configuration latches. The SE has its own dedicated
The major differences between the EEPROM and other
registers are as follows:
? An EEPROM location must be blank before it can be
512-byte EEPROM for storing state definitions, providing
63 individual states, each with a 64-bit word (one state is reserved).
At power-up, the first state is loaded from the SE EEPROM into
?
?
written to. If it contains data, the data must first be erased.
Writing to the EEPROM is slower than writing to the RAM.
Writing to the EEPROM should be restricted because it has
the engine itself. When the conditions of this state are met, the
next state is loaded from the EEPROM into the engine, and so on.
The loading of each new state takes approximately 10 μs.
To alter a state, the required changes must be made directly to
the EEPROM. RAM for each state does not exist. The relevant
alterations must be made to the 64-bit word, which is then
uploaded directly to the EEPROM.
INTERNAL REGISTERS
The ADM1068 contains a large number of data registers. The
principal registers are the address pointer register and the
a limited write/cycle life of typically 10,000 write operations
due to the usual EEPROM wear-out mechanisms.
The first EEPROM is split into 16 (0 to 15) pages of 32 bytes
each. Page 0 to Page 6, starting at Address 0xF800, hold the
configuration data for the applications on the ADM1068 (such
as the SFDs and PDOs). These EEPROM addresses are the same
as the RAM register addresses, prefixed by F8. Page 7 is reserved.
Page 8 to Page 15 are for customer use.
Data can be downloaded from the EEPROM to the RAM in one
of the following ways:
configuration registers.
Address Pointer Register
?
?
At power-up, when Page 0 to Page 6 are downloaded.
By setting Bit 0 of the UDOWNLD register (0xD8), which
The address pointer register contains the address that selects
one of the other internal registers. When writing to the
ADM1068, the first byte of data is always a register address that
is written to the address pointer register.
Configuration Registers
The configuration registers provide control and configuration
for various operating parameters of the ADM1068.
EEPROM
The ADM1068 has two 512-byte cells of nonvolatile, electrically
erasable, programmable, read-only memory (EEPROM), from
Register Address 0xF800 to Register Address 0xFBFF. The
EEPROM is used for permanent storage of data that is not lost
when the ADM1068 is powered down. One EEPROM cell contains
the configuration data of the device; the other contains the state
definitions for the SE. Although referred to as read-only memory,
performs a user download of Page 0 to Page 6.
SERIAL BUS INTERFACE
The ADM1068 is controlled via the serial system management
bus (SMBus) and is connected to this bus as a slave device under
the control of a master device. It takes approximately 1 ms after
power-up for the ADM1068 to download from its EEPROM.
Therefore, access to the ADM1068 is restricted until the download
is complete.
Identifying the ADM1068 on the SMBus
The ADM1068 has a 7-bit serial bus slave address (see Table 9).
The device is powered up with a default serial bus address. The
five MSBs of the address are set to 10001; the two LSBs are
determined by the logical states of Pin A1 and Pin A0. This
allows the connection of four ADM1068s to one SMBus.
Table 9. Serial Bus Slave Address
the EEPROM can be written to, as well as read from, using the
serial bus in exactly the same way as the other registers.
A1 Pin
Low
Low
High
High
A0 Pin
Low
High
Low
High
Hex Address
0x88
0x8A
0x8C
0x8E
7-Bit Address
1000100x 1
1000101x 1
1000110x 1
1000111x 1
1
x = Read/Write bit. The address is shown only as the first 7 MSBs.
Rev. C | Page 19 of 24
相关PDF资料
PDF描述
MAX6428BIUR+T IC MONITOR BAT LP SOT23-3
LTC692CS8#PBF IC MPU SUPERVISORY CIRCUIT 8SOIC
LTC694CN8#PBF IC MPU SUPERVISORY CIRCUIT 8-DIP
ADM8691ARWZ IC SUPERVSR MPU 4.65V ADJ 16SOIC
M3CMK-5018R IDC CABLE - MKC50K/MC50M/MCG50K
相关代理商/技术参数
参数描述
ADM1068ASTZ-REEL7 功能描述:IC SEQUENCER/SUPERVISOR 32LQFP RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:Super Sequencer® 标准包装:1 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:高有效 复位超时:- 电压 - 阀值:1.8V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:6-TSOP(0.059",1.50mm 宽)5 引线 供应商设备封装:5-TSOP 包装:剪切带 (CT) 其它名称:NCP301HSN18T1GOSCT
ADM1069 制造商:AD 制造商全称:Analog Devices 功能描述:SUPER SEQUENCER-TM WITH MARGINING CONTROL AND AUXILIARY ADC INPUTS
ADM1069ACP 制造商:Analog Devices 功能描述:FULL FEATURED MULTI POWER SUPPLY MARGINING SEQUENCER WITH LO - Bulk
ADM1069ACP-REEL 制造商:AD 制造商全称:Analog Devices 功能描述:SUPER SEQUENCER-TM WITH MARGINING CONTROL AND AUXILIARY ADC INPUTS
ADM1069ACP-REEL7 制造商:AD 制造商全称:Analog Devices 功能描述:SUPER SEQUENCER-TM WITH MARGINING CONTROL AND AUXILIARY ADC INPUTS