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参数资料
| 型号： | ADM1068ASTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 22/24页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR/SEQUENCER 32-LQFP |
| 标准包装： | 1 |
| 系列： | Super Sequencer® |
| 类型： | 序列发生器 |
| 监视电压数目： | 8 |
| 输出： | 可编程 |
| 电压 - 阀值： | 8 种可选阀值组合 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 托盘 |
| 产品目录页面： | 788 (CN2011-ZH PDF) |
| 配用： | EVAL-ADM1068LQEBZ-ND - BOARD EVALUATION FOR ADM1068LQ |
ADM1068
The master sends a command code telling the slave device
to erase the page. The ADM1068 command code for a page
erasure is 0xFE (1111 1110). Note that for a page erasure to
1
S
2
SLAVE
ADDRESS
3
W A
4
EEPROM
ADDRESS
HIGH BYTE
(0xF8 TO 0xFB)
5
A
6
EEPROM
ADDRESS
LOW BYTE
(0x00 TO 0xFF)
7 8
A P
SLAVE
ADDRESS
take place, the page address must be given in the previous
write word transaction (see the Write Byte/Word section). In
addition, Bit 2 in the UPDCFG register (Address 0x90)
must be set to 1.
1 2 3 4 5 6
COMMAND
S W A BYTE A P
(0xFE)
Figure 31. Setting an EEPROM Address
Because a page consists of 32 bytes, only the three MSBs of
the address low byte are important for page erasure. The
lower five bits of the EEPROM address low byte specify the
addresses within a page and are ignored during an erase
operation.
A
A DATA A P
S W A
Figure 29. EEPROM Page Erasure
As soon as the ADM1068 receives the command byte,
page erasure begins. The master device can send a stop
command as soon as it sends the command byte. Page
erasure takes approximately 20 ms. If the ADM1068 is
accessed before erasure is complete, it responds with a no
acknowledge (NACK).
Write Byte/Word
?
To write a single byte of data to the EEPROM. In this case, the
command byte is the high byte of EEPROM Address 0xF8
to EEPROM Address 0xFB. The first data byte is the low
byte of the EEPROM address, and the second data byte is
1 2 3 4 5 6 7 8 9 10
EEPROM EEPROM
SLAVE ADDRESS ADDRESS
ADDRESS HIGH BYTE LOW BYTE
(0xF8 TO 0xFB) (0x00 TO 0xFF)
Figure 32. Single Byte Write to the EEPROM
In a write byte/word operation, the master device sends a
command byte and one or two data bytes to the slave device, as
follows:
Block Write
In a block write operation, the master device writes a block of
1.
2.
3.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
The addressed slave device asserts ACK on SDA.
data to a slave device. The start address for a block write must
have been set previously. In the ADM1068, a send byte opera-
tion sets a RAM address, and a write byte/word operation sets
an EEPROM address, as follows:
4.
5.
6.
7.
8.
9.
The master sends a command code.
The slave asserts ACK on SDA.
The master sends a data byte.
The slave asserts ACK on SDA.
The master sends a data byte or asserts a stop condition.
The slave asserts ACK on SDA.
1.
2.
3.
4.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by
the write bit (low).
The addressed slave device asserts ACK on SDA.
The master sends a command code that tells the slave
device to expect a block write. The ADM1068 command
10. The master asserts a stop condition on SDA to end the
code for a block write is 0xFC (1111 1100).
transaction.
In the ADM1068, the write byte/word protocol is used for three
purposes:
5.
6.
The slave asserts ACK on SDA.
The master sends a data byte that tells the slave device how
many data bytes are being sent. The SMBus specification
?
To write a single byte of data to the RAM. In this case, the
command byte is RAM Address 0x00 to RAM Address
0xDF, and the only data byte is the actual data, as shown in
allows a maximum of 32 data bytes in a block write.
7. The slave asserts ACK on SDA.
8. The master sends N data bytes.
9. The slave asserts ACK on SDA after each data byte.
10. The master asserts a stop condition on SDA to end the
1
2
3
4
5
6
7 8
transaction.
S ADDRESS W A
SLAVE
RAM
ADDRESS
(0x00 TO 0xDF)
A DATA A P
1
2
3
4
5
6
7
8
9
10
S ADDRESS W A (BLOCK WRITE) A COUNT A
Figure 30. Single Byte Write to the RAM
SLAVE COMMAND 0xFC BYTE
DATA
1
A
DATA
2
A
DATA
N
A P
?
To set up a 2-byte EEPROM address for a subsequent read,
write, block read, block write, or page erase. In this case, the
command byte is the high byte of EEPROM Address 0xF8
to EEPROM Address 0xFB. The only data byte is the low
Figure 33. Block Write to the EEPROM or RAM
Unlike some EEPROM devices that limit block writes to within
a page boundary, there is no limitation on the start address
when performing a block write to EEPROM, except when
?
There must be at least N locations from the start address to
the highest EEPROM address (0xFBFF) to avoid writing to
invalid addresses.
Rev. C | Page 22 of 24
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| ADM1068ASTZ-REEL7 | 功能描述:IC SEQUENCER/SUPERVISOR 32LQFP RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:Super Sequencer® 标准包装:1 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:高有效 复位超时:- 电压 - 阀值:1.8V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:6-TSOP（0.059"，1.50mm 宽）5 引线 供应商设备封装:5-TSOP 包装:剪切带 (CT) 其它名称:NCP301HSN18T1GOSCT |
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