参数资料
型号: ADM1068ASTZ
厂商: Analog Devices Inc
文件页数: 23/24页
文件大小: 0K
描述: IC SUPERVISOR/SEQUENCER 32-LQFP
标准包装: 1
系列: Super Sequencer®
类型: 序列发生器
监视电压数目: 8
输出: 可编程
电压 - 阀值: 8 种可选阀值组合
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 32-LQFP
供应商设备封装: 32-LQFP(7x7)
包装: 托盘
产品目录页面: 788 (CN2011-ZH PDF)
配用: EVAL-ADM1068LQEBZ-ND - BOARD EVALUATION FOR ADM1068LQ
ADM1068
?
An address crosses a page boundary. In this case, both
8.
The slave asserts ACK on SDA.
pages must be erased before programming.
Note that the ADM1068 features a clock extend function for
writes to the EEPROM. Programming an EEPROM byte takes
approximately 250 μs, which limits the SMBus clock for repeated
or block write operations. The ADM1068 pulls SCL low and
extends the clock pulse when it cannot accept any
more data.
READ OPERATIONS
9.
10.
11.
12.
13.
The ADM1068 sends a byte-count data byte that tells th e
master how many data bytes to expect. The ADM1068
always returns 32 data bytes (0x20), whic h is the maximum
allowed by the SMBus 1.1 specifica tion.
The master asserts ACK on SDA.
The master receives 32 data bytes.
The master asserts ACK on SDA after each data byte.
The master a sserts a stop condition on SDA to end the
transaction.
The ADM1068 uses the following SMBus read protocols.
Receive Byte
1
S
2
SLAVE
ADDRESS
3
W A
4
COMMAND 0xFD
(BLOCK READ)
5 6
A S
7
SLAVE
ADDRESS
8
R A
9
BYTE
COUNT
10
A
11
DATA
1
12
A
In a receive byte operation, the master device receives a single
byte from a slave device, as follows:
13
1.
The master device asserts a start condition on SDA.
DATA
32
A
P
2.
The master sends the 7-bit slave address followed by the
read bit (high).
Figure 35. Block Read from the EEPROM or RAM
3.
4.
5.
6.
The addressed slave device asserts ACK on SDA.
The master receives a data byte.
The master asserts NACK on SDA.
The master asserts a stop condition on SDA, and the
transaction ends.
Error Correction
The ADM1068 provides the option of issuing a packet error
correction (PEC) byte after a write to the RAM, a write to the
EEPROM, a block write to the RAM/EEPROM, or a block r ead
from the RAM/ EEPROM. This option enables the user to
In the ADM1068, the receive byte protocol is used to read a
single byte of data from a RAM or EEPROM location whose
address has previously been set by a send byte or write
byte/word operation, as shown in Figure 34.
verify that the data received by or sent from the ADM1068 is
correct. The PEC byte is an optional byte sent after that last data
byte has been written to or read from the ADM1068. The protocol
is the same as a block read for Step 1 to Step 12 and then proceeds
1
2
3
4
5
6
as follows:
S
SLAVE
ADDRESS
R
A
DATA
A
P
13. The ADM1063 issues a PEC byte to the master. The master
checks the PEC byte an d issues another block read, if the
Figure 34. Single Byte Read from the EEPROM or RAM
Block Read
In a block read operation, the master device reads a block of
data from a slave device. The start address for a block read must
have been set previously. In the ADM1068, this is done by a
send byte operation to set a RAM address, or a write byte/word
operation to set an EEPROM address. The block read operation
itself consists of a send byte operation that sends a block read
command to the slave, immediately followed by a repeated start
and a read operation that reads out multiple data bytes, as follows:
PEC byte is incorrect.
14. A no acknowledge (NACK) is generated after the PEC byte
to signal the end of the read.
15. The master asser ts a stop condition on SDA to end
the transaction.
Note that the PEC byte is calculated using CRC-8. The frame
chec k sequence (FCS) confo rms to CRC-8 by the polynomial
C ( x ) = x 8 + x 2 + x 1 + 1
See the SMBus 1.1 specification for details.
1.
2.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address followed by the
write bit (low).
An example o f a block read with the optional PEC byte is shown
1 2 3 4 5 6 7 8 9 10 11 12
S ADDRESS W A
(BLOCK READ) A S ADDRESS R A COUNT A
3.
The addressed slave device asserts ACK on SDA.
SLAVE
COMMAND 0xFD SLAVE BYTE
DATA
1
A
4.
The master sends a command code that tells the slave
device to expect a block read. The ADM1068 command
13 14 15
5.
code for a block read is 0xFD (1111 1101).
The slave asserts ACK on SDA.
DATA
32
A PEC A P
6.
7.
The master asserts a repeat start condition on SDA.
The master sends the 7-bit slave address followed by the
read bit (high).
Rev. C | Page 23 of 24
Figure 36. Block Read from the EEPROM or RAM with PEC
相关PDF资料
PDF描述
MAX6428BIUR+T IC MONITOR BAT LP SOT23-3
LTC692CS8#PBF IC MPU SUPERVISORY CIRCUIT 8SOIC
LTC694CN8#PBF IC MPU SUPERVISORY CIRCUIT 8-DIP
ADM8691ARWZ IC SUPERVSR MPU 4.65V ADJ 16SOIC
M3CMK-5018R IDC CABLE - MKC50K/MC50M/MCG50K
相关代理商/技术参数
参数描述
ADM1068ASTZ-REEL7 功能描述:IC SEQUENCER/SUPERVISOR 32LQFP RoHS:是 类别:集成电路 (IC) >> PMIC - 监控器 系列:Super Sequencer® 标准包装:1 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:高有效 复位超时:- 电压 - 阀值:1.8V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:6-TSOP(0.059",1.50mm 宽)5 引线 供应商设备封装:5-TSOP 包装:剪切带 (CT) 其它名称:NCP301HSN18T1GOSCT
ADM1069 制造商:AD 制造商全称:Analog Devices 功能描述:SUPER SEQUENCER-TM WITH MARGINING CONTROL AND AUXILIARY ADC INPUTS
ADM1069ACP 制造商:Analog Devices 功能描述:FULL FEATURED MULTI POWER SUPPLY MARGINING SEQUENCER WITH LO - Bulk
ADM1069ACP-REEL 制造商:AD 制造商全称:Analog Devices 功能描述:SUPER SEQUENCER-TM WITH MARGINING CONTROL AND AUXILIARY ADC INPUTS
ADM1069ACP-REEL7 制造商:AD 制造商全称:Analog Devices 功能描述:SUPER SEQUENCER-TM WITH MARGINING CONTROL AND AUXILIARY ADC INPUTS