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| 型号： | ADM1069ASTZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 8/32页 |
| 文件大小： | 0K |
| 描述： | IC SUPERVISOR/SEQUENCER 32-LQFP |
| 标准包装： | 1 |
| 系列： | Super Sequencer® |
| 类型： | 序列发生器 |
| 监视电压数目： | 8 |
| 输出： | 可编程 |
| 电压 - 阀值： | 8 种可选阀值组合 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-LQFP |
| 供应商设备封装： | 32-LQFP（7x7） |
| 包装： | 托盘 |
| 产品目录页面： | 788 (CN2011-ZH PDF) |
| 配用： | EVAL-ADM1069LQEBZ-ND - BOARD EVALUATION FOR ADM1069LQ |
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ADM1069
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
32
25
VX1
VX2
VX3
VX4
VP1
VP2
VP3
VH
1
8
PIN 1
INDICATOR
ADM1069
TOP VIEW
(Not to Scale)
24
17
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
NC 1
VX1 2
VX2 3
VX3 4
VX4 5
NC 6
VP1 7
VP2 8
VP3 9
VH 10
PIN 1
INDICATOR
ADM1069
TOP VIEW
(Not to Scale)
30
29
28
27
26
25
24
23
22
21
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
NC
NC
9
16
NOTES
1. NC = NO CONNEC T.
2. THE LFCSP HAS AN EXPOSED PAD ON THE BOTTOM.
THIS PAD IS A NO CONNECT (NC). IF POSSIBLE, THIS
PAD SHOULD BE SOLDERED TO THE BOARD FOR
IMPROVED MECHANICAL STABILITY.
Figure 3. LQFP Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Figure 4. LFCSP Pin Configuration
LQFP
LFCSP 1
1, 6, 15,
Mnemonic
NC
Description
No Connect.
16, 21,
22, 37, 38
1 to 4
2 to 5
VX1 to VX4 (VXx)
High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V
to 1.375 V. Alternatively, these pins can be used as general-purpose digital inputs.
5 to 7
7 to 9
VP1 to VP3 (VPx)
Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to these pins, the output of which connects to a supply
fault detector. These pins allow thresholds from 2.5 V to 6.0 V, from 1.25 V to 3.00 V, and from 0.573 V
to 1.375 V.
8
10
VH
High Voltage Input to Supply Fault Detectors. Three input ranges can be set by altering the input
attenuation on a potential divider connected to this pin, the output of which connects to a supply
fault detector. This pin allows thresholds from 6.0 V to 14.4 V and from 2.5 V to 6.0 V.
9
10
11
11
12
13
AGND 2
REFGND 2
REFIN
Ground Return for Input Attenuators.
Ground Return for On-Chip Reference Circuits.
Reference Input for ADC. Nominally, 2.048 V. This pin must be driven by a reference voltage. The
on-board reference can be used by connecting the REFOUT pin to the REFIN pin. This is the normal
configuration.
12
14
REFOUT
2.048 V Reference Output. A reservoir capacitor must be connected between this pin and GND.
A 10 μF capacitor is recommended for this purpose.
13 to 16
17 to 24
25
26
17 to 20
23 to 30
31
32
DAC1 to DAC4
PDO8 to PDO1
PDOGND 2
VCCP
Voltage Output DACs. These pins default to high impedance at power-up.
Programmable Output Drivers.
Ground Return for Output Drivers.
Central Charge-Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this
pin and GND. A 10 μF capacitor is recommended for this purpose.
27
28
29
30
33
34
35
36
A0
A1
SCL
SDA
Logic Input. This pin sets the seventh bit of the SMBus interface address.
Logic Input. This pin sets the sixth bit of the SMBus interface address.
SMBus Clock Pin. Bidirectional open drain requires external resistive pull-up.
SMBus Data Pin. Bidirectional open drain requires external resistive pull-up.
Rev. C | Page 8 of 32
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