
ADM1192
WRITE AND READ OPERATIONS
The I
2
C specification defines several protocols for different
types of read and write operations. The operations used in the
ADM1192 are discussed in the sections that follow. Table 6
shows the abbreviations used in the command diagrams.
Table 6. I
2
C Abbreviations
Abbreviation
S
P
R
W
A
N
Rev. 0 | Page 12 of 20
Condition
Start
Stop
Read
Write
Acknowledge
No acknowledge
QUICK COMMAND
The quick command operation allows the master to check if the
slave is present on the bus, as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address, followed by the
write bit (low).
3.
The addressed slave device asserts an acknowledge on SDA.
S
ASLAVE
1
2
3
0
Figure 21. Quick Command
WRITE COMMAND BYTE
In the write command byte operation, the master device sends
a command byte to the slave device, as follows:
1.
The master device asserts a start condition on SDA.
2.
The master sends the 7-bit slave address, followed by the
write bit (low).
3.
The addressed slave device asserts an acknowledge on SDA.
4.
The master sends the command byte. The command byte
is identified by an MSB = 0. An MSB =1 indicates an
extended register write (see the Write Extended Byte
section).
5.
The slave asserts an acknowledge on SDA.
6.
The master asserts a stop condition on SDA to end the
transaction.
S
SLAVE
ADDRESSW ACOMMAND
BYTE
A P
1
2
3
4
5 6
0
Figure 22. Write Command Byte
The seven LSBs of the command byte are used to configure and
control the ADM1192. Table 7 provides details of the function
of each bit.
Table 7. Command Byte Operations
Bit
Default
Name
Function
C0
0
V_CONT
Set to convert voltage continuously. If readback is attempted before the first conversion is complete,
the ADM1192 asserts an acknowledge and returns all 0s in the returned data.
C1
0
V_ONCE
Set to convert voltage once. Self-clears. I
2
C asserts a no acknowledge on attempted reads until ADC
conversion is complete.
Set to convert voltage continuously. If readback is attempted before the first conversion is complete,
the ADM1192 asserts an acknowledge and returns all 0s in the returned data.
Set to convert current once. Self-clears. I
2
C asserts a no acknowledge on attempted reads until ADC
conversion is complete.
Selects different internal attenuation resistor networks for voltage readback. A 0 in C4 selects a 14:1 voltage
divider. A 1 in C4 selects a 7:2 voltage divider. With an ADC full scale of 1.902 V, the voltage at the VCC pin for
an ADC full-scale result is 26.52 V for VRANGE = 0 and 6.65 V for VRANGE = 1.
Unused.
Status Read. When this bit is set, the data byte read back from the ADM1192 is the STATUS byte. This contains
the status of the device alerts. See Table 15 for full details of the STATUS byte.
C2
0
I_CONT
C3
0
I_ONCE
C4
0
VRANGE
C5
C6
0
0
N/A
STATUS_RD