参数资料
型号: ADM8690ANZ
厂商: Analog Devices Inc
文件页数: 17/24页
文件大小: 0K
描述: IC SUPERVISOR MPU 4.65V 8DIP
标准包装: 50
类型: 备用电池电路
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 最小为 35 ms
电压 - 阀值: 4.65V
工作温度: -40°C ~ 85°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件

Data Sheet
TYPICAL APPLICATIONS
ADM8690 APPLICATIONS
Figure 30 shows the ADM8690 in a typical power monitoring,
battery backup application. V OUT powers the CMOS RAM.
Under normal operating conditions with V CC present, V OUT
is internally connected to V CC . If a power failure occurs, V CC
decays and V OUT is switched to V BATT , thereby maintaining
ADM8690/ADM8691/ADM8695
Figure 31 shows a similar application, but in this case the PFI
input monitors the unregulated input to the 7805 voltage regu-
lator. This circuit provides an earlier warning of an impending
power failure. It is useful with processors that operate at low
speeds or where there are a significant number of housekeeping
tasks to be completed before the power is lost.
power for the CMOS RAM. A RESET pulse is also generated
INPUT
POWER
7805
5V
POWER
V CC
when V CC falls below 4.65 V for the ADM8690 . RESET remains
low for 50 ms after V CC returns to 5 V.
5V
R1
V > 8V
R1
R2
V CC
PFI V OUT
ADM8690
0.1μF
0.1μF
POWER
CMOS RAM
POWER
MICROPROCESSOR
SYSTEM
R2
PFI V OUT
ADM8690
0.1μF
CMOS RAM
POWER
MICROPROCESSOR
SYSTEM
BATTERY
+
V BATT
RESET
PFO
GND WDI
RESET
NMI
I/O LINE
BATTERY
+
V BATT
RESET
PFO
GND WDI
RESET
NMI
I/O LINE
Figure 31. ADM8690 Typical Application, Circuit B
ADM8691 / ADM8695 APPLICATIONS
Figure 32 shows a typical connection for the ADM8691 / ADM8695 .
Figure 30. ADM8690 Typical Application, Circuit A
The watchdog timer input (WDI) monitors an input/output
line from the microprocessor system. This line must be toggled
once every 1.6 sec to verify correct software execution. Failure
to toggle the line indicates that the microprocessor system is
not correctly executing its program and may be tied up in an
endless loop. If this happens, a reset pulse is generated to
initialize the microprocessor.
If the watchdog timer is not needed, the WDI input should be
left floating.
CMOS RAM is powered from V OUT . When 5 V power is present,
this voltage is routed to V OUT . If V CC fails, V BATT is routed to V OUT .
V OUT can supply up to 100 mA from V CC , but if more current is
required, an external PNP transistor can be added. When V CC is
higher than V BATT , the BATT ON output goes low, providing up
to 35 mA of base drive for the external transistor. A 0.1 μF capac-
itor is connected to V OUT to supply the transient currents for
CMOS RAM. When V CC is lower than V BATT , an internal 20 Ω
MOSFET connects the backup battery to V OUT .
INPUT POWER
5V
The power-fail input, PFI, monitors the input power supply via
0.1μF
0.1μF
a resistive divider network. The voltage on the PFI input is
compared with a precision 1.3 V internal reference. If the input
3V
BATTERY
V CC
V BATT
BATT
ON
V OUT
CE OUT
CMOS
RAM
ADM8695
voltage drops below 1.3 V, a power-fail output (PFO) signal is
generated. This signal warns of an impending power failure and
can be used to interrupt the processor so that the system can be
shut down in an orderly fashion. The resistors in the sensing
R1
R2
NC
ADM8691/
PFI
GND
OSC IN
CE IN
WDI
PFO
ADDRESS
DECODE
A0 TO A15
I/O LINE
NMI
network are ratioed to give the desired power-fail threshold
OSC SEL
RESET
RESET
voltage (V T ).
LOW LINE WDO
RESET
0.1μF MICROPROCESSOR
SYSTEM
V T = (1.3 R1/R2 ) + 1.3 V
R1/R2 = ( V T /1.3) ? 1
Rev. C | Page 17 of 24
SYSTEM STATUS
INDICATORS
Figure 32. ADM8691 / ADM8695 Typical Application
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