参数资料
型号: ADM8690ANZ
厂商: Analog Devices Inc
文件页数: 18/24页
文件大小: 0K
描述: IC SUPERVISOR MPU 4.65V 8DIP
标准包装: 50
类型: 备用电池电路
监视电压数目: 1
输出: 推挽式,图腾柱
复位: 低有效
复位超时: 最小为 35 ms
电压 - 阀值: 4.65V
工作温度: -40°C ~ 85°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件
ADM8690/ADM8691/ADM8695
RESET OUTPUT
The internal voltage detector monitors V CC and generates a
RESET output to hold the microprocessor reset line low when
V CC is below 4.65 V. An internal timer holds RESET low for
50 ms (200 ms for the ADM8695 ) after V CC rises above 4.65 V.
This prevents repeated toggling of RESET, even if the 5 V
power drops out and recovers with each power line cycle.
The crystal oscillator normally used to generate the clock for
microprocessors can take several milliseconds to stabilize.
Because most microprocessors need several clock cycles to
reset, RESET must be held low until the microprocessor clock
oscillator has started. The power-up RESET pulse lasts 50 ms
(200 ms for the ADM8695 ) to allow for this oscillator start-up
time. If a different reset pulse width is required, a capacitor
should be connected to OSC IN, or an external clock can be
used (see Table 5 and Figure 17 through Figure 20). The manual
reset switch and the 0.1 μF capacitor connected to the reset line
can be omitted if a manual reset is not needed. An inverted,
active high RESET output is also available on the ADM8691 /
POWER-FAIL DETECTOR
The 5 V V CC power line is monitored via a resistive potential
divider connected to the power-fail input (PFI). When the voltage
at PFI falls below 1.3 V, the power-fail output (PFO) drives the
processor’s NMI input low. For example, if a power-fail threshold
of 4.8 V is set with Resistor R1 and Resistor R2 and V CC falls from
4.8 V to 4.65 V, the microprocessor has time to save data into RAM.
An earlier power-fail warning can be generated if the unregulated
Data Sheet
RAM WRITE PROTECTION
The ADM8691 / ADM8695 CE OUT line drives the chip select
inputs of the CMOS RAM. CE OUT follows CE IN as long as V CC
is above the 4.65 V reset threshold.
If V CC falls below the reset threshold, CE OUT goes high, independent
of the logic level at CE IN . This prevents the microprocessor from
writing erroneous data into RAM during power-up, power-down,
brownouts, and momentary power interruptions.
WATCHDOG TIMER
The microprocessor drives the watchdog input (WDI) with an
input/output line. When OSC IN and OSC SEL are unconnected,
the microprocessor must toggle the WDI pin once every 1.6 sec
to verify proper software execution. If a hardware or software fail-
ure occurs such that WDI is not t oggled, the ADM8691 issues a
50 ms (200 ms for the ADM8695 ) RESET pulse after 1.6 sec. This
typically restarts the microprocessor power-up routine. A new
RESET pulse is issued every 1.6 sec until WDI is again strobed.
If a different watchdog timeout period is required, a capacitor
should be connected to OSC IN or an external clock can be
used (see Table 5 and Figure 17 through Figure 20).
The watchdog output (WDO) goes low if the watchdog timer is
not serviced within its timeout period. After WDO goes low, it
remains low until a transition occurs at WDI. The watchdog
timer feature can be disabled by leaving WDI unconnected.
The RESET output has an internal 3 μA pull-up and can either
connect to an open-collector reset bus or directly drive a CMOS
gate without an external pull-up resistor.
dc input to the 5 V regulator is available for monitoring. This
allows more time for microprocessor housekeeping tasks to be
completed before power is lost.
Rev. C | Page 18 of 24
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ADM8690ARN-REEL 功能描述:IC SUPERVISOR MPU 4.65V 8SOIC TR RoHS:否 类别:集成电路 (IC) >> PMIC - 监控器 系列:- 标准包装:1 系列:- 类型:简单复位/加电复位 监视电压数目:1 输出:开路漏极或开路集电极 复位:高有效 复位超时:- 电压 - 阀值:1.8V 工作温度:-40°C ~ 125°C 安装类型:表面贴装 封装/外壳:6-TSOP(0.059",1.50mm 宽)5 引线 供应商设备封装:5-TSOP 包装:剪切带 (CT) 其它名称:NCP301HSN18T1GOSCT
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