参数资料
型号: ADMC201AP
厂商: ANALOG DEVICES INC
元件分类: 微控制器/微处理器
英文描述: Motion Coprocessor
中文描述: SPECIALTY MICROPROCESSOR CIRCUIT, PQCC68
封装: PLASTIC, LCC-68
文件页数: 14/15页
文件大小: 146K
代理商: ADMC201AP
ADMC201
REV. B
14
Table VIII. System Status Register (SYSSTAT)
1
RESET
Default
Bit
Function
0
A/D Conversion
Completion Interrupt
(1 = True)
Vector Transformation
Completion Interrupt
(1 = True)
Digital I/O Change of State
Interrupt (1 = True)
Rotation Results are Valid
(1 = Valid)
IRQ
Generated from This
Device (1 = True)
0
1
0
2
0
4
X
2
0
11
NOTES
1
Reading this register clears the interrupt status flags Bits 0, 1, 2 and 11.
2
Undefined until the first Vector Transformation has started
Bit 0
A/D Conversion Completion Interrupt. This register
is set to 1 when the A/D conversion process has com-
pleted and ADC interrupts have been enabled in the
SYSCTRL register.
Bit 1
Interrupt Status. This register is set to 1 when the
Vector Transformation is completed and the Vector
Transformation completion interrupts have been
enabled.
Bit 4
This bit is set to 1 when the rotation results are valid
reading this.
Bit 11 If any interrupt source on the ADMC201 occurs, then
this bit is set to 1.
Table IX. Programmable Digital I/O Control Register
(PIOCTRL)
RESET
Default
Bit
Function
0
Programmable Digital I/O Direction
Bit 0 (0 = Input, 1 = Output)
Programmable Digital I/O Direction
Bit 1 (0 = Input, 1 = Output)
Programmable Digital I/O Direction
Bit 2 (0 = Input, 1 = Output)
Programmable Digital I/O Direction
Bit 3 (0 = Input, 1 = Output)
Programmable Digital I/O Direction
Bit 4 (0 = Input, 1 = Output)
Programmable Digital I/O Direction
Bit 5 (0 = Input, 1 = Output)
Programmable Digital I/O Bit 0 Interrupt
(0 = Disable, 1 = Enable)
Programmable Digital I/O Bit 1 Interrupt
(0 = Disable, 1 = Enable)
Programmable Digital I/O Bit 2 Interrupt
(0 = Disable, 1 = Enable)
Programmable Digital I/O Bit 3 Interrupt
(0 = Disable, 1 = Enable)
Programmable Digital I/O Bit 4 Interrupt
(0 = Disable, 1 = Enable)
Programmable Digital I/O Bit 5 Interrupt
(0 = Disable, 1 = Enable)
0
1
0
2
0
3
0
4
0
5
0
6
0
7
0
8
0
9
0
10
0
11
0
Bits 0
5
Sets corresponding Digital I/O bits as either input
or output.
Bits 6
11 Configures Digital I/O Bits 0
5 as interrupt on
change of state sources. Enabling interrupts for bits
configured as output has no effect.
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