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| 型号： | ADN8830ACPZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/22页 |
| 文件大小： | 0K |
| 描述： | IC CTRLR THERMO COOLER 32-LFCSP |
| 标准包装： | 1 |
| 应用： | 热电冷却器 |
| 电流 - 电源： | 8mA |
| 电源电压： | 3.3 V ~ 5 V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 32-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 32-LFCSP-VQ（5x5） |
| 包装： | 托盘 |
| 产品目录页面： | 789 (CN2011-ZH PDF) |
| 其它名称： | 015-0070 Q2376189 |
ADN8830
PIN FUNCTION DESCRIPTIONS
Pin No.
1
2
3
4
5
Mnemonic
THERMFAULT
THERMIN
SD
TEMPSET
TEMPLOCK
Type
Digital Output
Analog Input
Digital Input
Analog Input
Digital Output
Description
Indicates an Open or Short-Circuit Condition from Thermistor.
Thermistor Feedback Input.
Puts Device into Low Current Shutdown Mode. Active low.
Target Temperature Input.
Indicates when Thermistor Temperature is within ± 0.1 ° C of Target Tem-
perature as Set by TEMPSET Voltage.
6
NC
No Connection, except as Noted in the Application Notes Section.
7
8
9
10
11
12
VREF
AVDD
OUT B
N2
P2
TEMPCTL
Analog Output
Power
Analog Input
Analog Output
Analog Output
Analog Output
2.5 V Reference Voltage.
Power for Nondriver Sections. 3.0 V min; 5.5 V max.
Linear Output Feedback. Will typically connect to TEC+ pin of TEC.
Drives Linear Output External NMOS Gate.
Drives Linear Output External PMOS Gate.
Output of Error Amplifier. Connects to COMPFB through feedforward
section of compensation network.
13
COMPFB
Analog Input
Feedback Summing Node of Compensation Amplifier. Connects to
TEMPCTL and COMPOUT through compensation network.
14
COMPOUT
Analog Output
Output of Compensation Amplifier. Connects to COMPFB through feed-
back section of compensation network.
15
16
VLIM
VTEC
Analog Input
Analog Output
Sets Maximum Voltage across TEC.
Indicates Relative Voltage across the TEC. The 1.5 V corresponds to 0 V
across TEC. The 3.0 V indicates maximum output voltage, maximum heat
transfer through TEC.
17
18
COMPSWOUT
COMPSWIN
Analog Output
Analog Input
Compensation for Switching Amplifier.
Compensation for Switching Amplifier. Capacitor connected between
COMPSWIN and COMPSWOUT.
19
20
21
22
23
OUT A
PVDD
P1
N1
PGND
Analog Input
Power
Digital Output
Digital Output
Ground
PWM Output Feedback. Will typically connect to TEC– pin of TEC.
Power for Output Driver Sections. 3.0 V min; 5.5 V max.
Drives PWM Output External PMOS Gate.
Drives PWM Output External NMOS Gate.
Power Ground. External NMOS devices connect to PGND. Can be
connected to digital ground as noise sensitivity at this node is not critical.
24
25
26
27
28
COMPOSC
SYNCIN
FREQ
SOFTSTART
SYNCOUT
Analog Input
Digital Input
Analog Input
Analog Input
Digital Output
Connect as Indicated in the Application Notes Section.
Optional Clock Input. If not connected, clock frequency set by FREQ pin.
Sets Switching Frequency.
Controls Initialization Time for ADN8830 with Capacitor to Ground.
Phase Adjusted Clock Output. Phase set from PHASE pin. Can be used to
drive SYNCIN of other ADN8830 devices.
29
30
31
32
EP
PHASE
AGND
TEMPOUT
NC
Exposed Pad
Analog Input
Ground
Analog Output
Sets Switching and SYNCOUT Clock Phase Relative to SYNCIN Clock.
Analog Ground. Should be low noise for highest accuracy.
Indication of Thermistor Temperature.
No Connection.
The exposed pad on the bottom of the package must be connected to V CC or the
GND plane.
–4 –
REV. D
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