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参数资料
| 型号： | ADP1752ACPZ-1.8-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 6/20页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 1.8V .8A 16LFCSP |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 1.8V |
| 输入电压： | 最高 3.6V |
| 电压 - 压降（标准）： | 0.07V @ 800mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 800mA（最小值） |
| 电流 - 限制（最小）： | 1A |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-VQFN 裸露焊盘，CSP |
| 供应商设备封装： | 16-LFCSP-VQ EP（4x4） |
| 包装： | 标准包装 |
| 其它名称： | ADP1752ACPZ-1.8-R7DKR |
ADP1752/ADP1753
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
PIN 1
PIN 1
Data Sheet
VIN 1
VIN 2
VIN 3
EN 4
INDICATOR
ADP1752
TOP VIEW
(Not to Scale)
12 VOUT
11 VOUT
10 VOUT
9 SENSE
VIN 1
VIN 2
VIN 3
EN 4
INDICATOR
ADP1753
TOP VIEW
(Not to Scale)
12 VOUT
11 VOUT
10 VOUT
9 ADJ
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD ON THE BOTTOM OF THE LFCSP ENHANCES
THERMAL PERFORMANCE AND IS ELECTRICALLY CONNECTED TO GND
INSIDE THE PACKAGE. IT IS RECOMMENDED THAT THE EXPOSED PAD
BE CONNECTED TO THE GROUND PLANE ON THE BOARD.
Figure 3. ADP1752 Pin Configuration
Table 5. Pin Function Descriptions
NOTES
1. NC = NO CONNECT.
2. THE EXPOSED PAD ON THE BOTTOM OF THE LFCSP ENHANCES
THERMAL PERFORMANCE AND IS ELECTRICALLY CONNECTED TO GND
INSIDE THE PACKAGE. IT IS RECOMMENDED THAT THE EXPOSED PAD
BE CONNECTED TO THE GROUND PLANE ON THE BOARD.
Figure 4. ADP1753 Pin Configuration
Pin No.
1, 2, 3, 15, 16
4
5
Pin No.
1, 2, 3, 15, 16
4
5
Mnemonic
VIN
EN
PG
Description
Regulator Input Supply. Bypass VIN to GND with a 4.7 μF or greater capacitor. Note that all
five VIN pins must be connected to the source.
Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For
automatic startup, connect EN to VIN.
Power Good. This open-drain output requires an external pull-up resistor to VIN. If the part is
in shutdown mode, current-limit mode, thermal shutdown, or if it falls below 90% of the
nominal output voltage, PG immediately transitions low.
6
7
8
9
N/A
10, 11, 12,
13, 14
17 (EPAD)
6
7
8
N/A
9
10, 11, 12,
13, 14
17 (EPAD)
GND
SS
NC
SENSE
ADJ
VOUT
Exposed
paddle
(EPAD)
Ground.
Soft Start. A capacitor connected to this pin determines the soft start time.
Not Connected. No internal connection.
Sense. This pin measures the actual output voltage at the load and feeds it to the error
amplifier. Connect SENSE as close as possible to the load to minimize the effect of IR drop
between the regulator output and the load.
Adjust. A resistor divider from VOUT to ADJ sets the output voltage.
Regulated Output Voltage. Bypass VOUT to GND with a 4.7 μF or greater capacitor. Note that
all five VOUT pins must be connected to the load.
The exposed pad on the bottom of the LFCSP package enhances thermal performance and
is electrically connected to GND inside the package. It is recommended that the exposed
pad be connected to the ground plane on the board.
Rev. F | Page 6 of 20
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| ADP1752ACPZ-2.5-R7 | 功能描述:IC REG LDO 2.5V .8A 16LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - 线性 系列:- 标准包装:1 系列:- 稳压器拓扑结构:正，固定式 输出电压:3.3V 输入电压:2.5 V ~ 5.5 V 电压 - 压降（标准）:0.1V @ 200mA 稳压器数量:2 电流 - 输出:300mA 电流 - 限制（最小）:350mA 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:8-UFQFN 供应商设备封装:8-MLPQ-UT（1.5x1.5） 包装:剪切带 (CT) 产品目录页面:1358 (CN2011-ZH PDF) 其它名称:SC560HULCT |
| ADP1752-BL1-EVZ | 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1752 - Boxed Product (Development Kits) |
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| ADP1753-BL1-EVZ | 制造商:Analog Devices 功能描述:BLANK ADISIMPOWER EVAL ADP1753 - Boxed Product (Development Kits) |
| ADP1753-EVALZ | 制造商:AD 制造商全称:Analog Devices 功能描述:0.8 A, Low VIN, Low Dropout Linear Regulator |
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