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| 型号： | ADP1829-EVALZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 24/28页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION ADP1829 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 2，非隔离 |
| 输出电压： | 1.2V，1.8V |
| 电流 - 输出： | 15A，15A |
| 输入电压： | 5.5 ~ 18 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 300kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ADP1829 |
| 相关产品： | ADP1829ACPZ-R7DKR-ND - IC REG CTRLR BUCK PWM VM 32LFCSP ADP1829ACPZ-R7CT-ND - IC REG CTRLR BUCK PWM VM 32LFCSP ADP1829ACPZ-R7TR-ND - IC REG CTRLR BUCK PWM VM 32LFCSP |
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ADP1829
Setting the Channel 2 Undervoltage Threshold for
Ratiometric Tracking
If FB2 is regulated to a voltage lower than 0.6 V by configuring
TRK2 for ratiometric tracking, the Channel 2 undervoltage
threshold can be set appropriately by splitting the top resistor in
the voltage divider, as shown in Figure 33. R BOT is the same as
calculated for the compensation in Equation 52, and
Data Sheet
THERMAL CONSIDERATIONS
The current required to drive the external MOSFETs comprises
the vast majority of the power dissipation of the ADP1829. The
on-chip LDO regulates down to 5 V, and this 5 V supplies the
drivers. The full gate drive current passes through the LDO and
is then dissipated in the gate drivers. The power dissipated on
the gate drivers on the ADP1829 is
R A
R TOP = R A + R B
550mV
CHANNEL 2
OUTPUT
VOLTAGE
UV2
(53)
P D = V IN f SW ( Q DH 1 + Q DL 1 + Q DH 2 + Q DL 2 )
where:
V IN is the voltage applied to IN.
f SW is the switching frequency.
Q numbers are the total gate charge specifications from the
selected MOSFET data sheets.
(57)
POK2
R B
The power dissipation heats the ADP1829. As the switching
frequency, the input voltage, and the MOSFET size increase, the
TO ERROR
AMPLIFIER
750mV
FB2
R BOT
power dissipation on the ADP1829 increases. Care must be taken
not to exceed the maximum junction temperature. To calculate
the junction temperature from the ambient temperature and
power dissipation,
Figure 33. Setting the Channel 2 Undervoltage Threshold
T J = T A + P D θ JA
(58)
V FB 2 V UV 2 ? V FB 2 V OUT 2 ? V UV 2
The current in all the resistors is the same:
= =
R BOT R B R A
(54)
The thermal resistance, θ JA , of the package is typically 40°C/W
depending on board layout, and the maximum specified
junction temperature is 125°C, which means that at maximum
ambient of 85°C without airflow, the maximum dissipation
( V OUTA 2 ? V UV 2 )
R A = R BOT
( V UV 2 ? V FB 2 )
R B = R BOT
where:
V UV2 is 600 mV.
V FB2 is the feedback voltage value set during the ratiometric
tracking calculations.
V OUT2 is the Channel 2 output voltage.
Solving for R A and R B ,
V FB 2
V FB 2
allowed is about 1 W.
A thermal shutdown protection circuit on the ADP1829 shuts
off the LDO and the controllers if the die temperature exceeds
approximately 145°C, but this is a gross fault protection only
and should not be relied upon for system reliability.
(55)
(56)
Rev. C | Page 24 of 28
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