参数资料
型号: ADP1850SP-EVALZ
厂商: Analog Devices Inc
文件页数: 24/32页
文件大小: 0K
描述: EVAL BOARD FOR ADP1850SP
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 2,非隔离
输出电压: 1.8V,3.3V
电流 - 输出: 14A,14A
输入电压: 10 ~ 20 V
稳压器拓扑结构: 降压
频率 - 开关: 600kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: ADP1850SP
ADP1850
Another ratiometric tracking configuration is having the slave
channel rise more quickly than the master channel, as shown in
Figure 40 and Figure 41. The tracking circuits in Figure 39 and
Figure 41 are virtually identical with the exception that R TRKB >
R TRKT as shown in Figure 41.
MASTER VOLTAGE
SLAVE VOLTAGE
Data Sheet
INDEPDENDENT POWER STAGE INPUT VOLTAGE
In addition to the single power supply configuration, the power
stage input voltage of the dc-to-dc converter can come from a
different voltage supply, as illustrated in Figure 42. The range of
the power stage input voltage (V PIN ) is 1 V to 20 V. For instance,
the bias input voltage (V IN ) is 5 V, V PIN can be as low as 1 V or as
high as 20 V. The user needs to make sure that the minimum
or the maximum duty cycle is not violated in this operating
condition. Furthermore, note that R RAMP is connected to V PIN .
TIME
V IN = 2.7V TO 20V
V PIN = 1V TO 20V
R RAMP1
Figure 40. Ratiometric Tracking (Slave Channel Has a Faster Ramp Rate)
VIN
RAMP1
EN
3.3V
V OUT1_MASTER
ADP1850
DH1
V OUT1
VCCO
EN1 EN2
ADP1850
TRK1 FB1
45.3k ?
10k ?
R TRKT
5k ?
2.2V
R TRKB
10k ?
SW1
FB1
DL1
PGND1
C SS1
100nF
R BOT R TOP
10k ? 20k ?
SS1 TRK2
SS2
FB2
C SS2
20nF
RAMP2
DH2
SW2
R RAMP2
V PIN = 1V TO 20V
V OUT2
1.8V
V OUT2_SLAVE
Figure 41. Example of a Ratiometric Tracking Circuit (Slave Channel Has a
Faster Ramp Rate)
FB2
DL2
PGND2
Figure 42. Independent Power Stage Input Voltage (Simplified Schematic)
Rev. A | Page 24 of 32
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