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| 型号： | ADP1871-0.6-EVALZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 28/44页 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADP1871-0.6 |
| 标准包装： | 1 |
| 系列： | * |
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ADP1870/ADP1871
Data Sheet
THERMAL CONSIDERATIONS
The ADP1870/ADP1871 are used for dc-to-dc, step down, high
current applications that have an on-board controller, an on-board
LDO, and on-board MOSFET drivers. Because applications may
require up to 20 A of load current delivery and be subjected to
high ambient temperature surroundings, the selection of external
upper- and lower-side MOSFETs must be associated with careful
thermal consideration to not exceed the maximum allowable
junction temperature of 125°C. To avoid permanent or irreparable
damage if the junction temperature reaches or exceeds 155°C, the
part enters thermal shutdown, turning off both external MOSFETs,
and does not reenable until the junction temperature cools to
130
125
120
115
110
105
100
95
90
85
80
600kHz
300kHz
1MHz
V OUT = 0.8V
V OUT = 1.8V
V OUT = HIGH SETPOINT
140°C (see the On-Board Low Dropout Regulator section).
5.5
7.0
8.5
10.0
11.5
13.0
V IN (V)
14.5
16.0
17.5
19.0
In addition, it is important to consider the thermal impedance
of the package. Because the ADP1870/ADP1871 employ an on-
board LDO, the ac current (fxCxV) consumed by the internal
drivers to drive the external MOSFETs adds another element of
power dissipation across the internal LDO. Equation 3 shows the
power dissipation calculations for the integrated drivers and for
the internal LDO.
Figure 84. Ambient Temperature vs. V IN for 10-Lead LFCSP (40°C/W),
4-Layer EVB, CIN = 4.3 nF (Upper-/Lower-Side MOSFET)
The maximum junction temperature allowed for the ADP1870/
ADP1871 ICs is 125°C. This means that the sum of the ambient
temperature (T A ) and the rise in package temperature (T R ),
which is caused by the thermal impedance of the package and
the internal power dissipation, should not exceed 125°C, as
dictated by the following expression:
which are available in both 10-lead MSOP and 10-lead LFCSP
packages.
Table 9. Thermal Impedance for 10-lead MSOP
T J = T R × T A
where:
T A is the ambient temperature.
(1)
Parameter
10-Lead MSOP θ JA
2-Layer Board
4-Layer Board
10-Lead LFCSP θ JA
4-Layer Board
Thermal Impedance
213.1°C/W
171.7°C/W
40°C/W
T J is the maximum junction temperature.
T R is the rise in package temperature due to the power
dissipated from within.
The rise in package temperature is directly proportional to its
thermal impedance characteristics. The following equation
represents this proportionality relationship:
that can surround the ADP1870/ADP1871 IC for a specified
T R = θ JA × P DR(LOSS)
(2)
high input voltage (V IN ). Figure 83 illustrates the temperature
derating conditions for each available switching frequency for
low, typical, and high output setpoints for both the 10-lead
MSOP and LFCSP packages. All temperature derating criteria
are based on a maximum IC junction temperature of 125°C.
where:
θ JA is the thermal resistance of the package from the junction to
the outside surface of the die, where it meets the surrounding air.
P DR(LOSS) is the overall power dissipated by the IC.
The bulk of the power dissipated is due to the gate capacitance
150
140
130
120
110
100
90
80
600kHz
300kHz
1MHz
V OUT = 0.8V
V OUT = 1.8V
V OUT = HIGH SETPOINT
of the external MOSFETs and current running through the on-
board LDO. The power loss equations for the MOSFET drivers
Loss section in the Efficiency Consideration section) are:
P DR(LOSS) = [ V DR × ( f SW C upperFET V DR + I BIAS )] +
[ V REG × ( f SW C lowerFET V REG + I BIAS )]
(3)
70
60
50
40
30
20
10
0
5.5 7.0 8.5 10.0 11.5 13.0 14.5 16.0 17.5 19.0
V IN (V)
Figure 83. Ambient Temperature vs. V IN for 10-Lead MSOP (171°C/W),
where:
C upperFET is the input gate capacitance of the upper-side MOSFET.
C lowerFET is the input gate capacitance of the lower-side MOSFET.
I BIAS is the dc current (2 mA) flowing into the upper- and lower-
side drivers.
V DR is the driver bias voltage (the low input voltage (V REG )
minus the rectifier drop (see Figure 81)).
V REG is the LDO output/bias voltage.
4-Layer EVB, CIN = 4.3 nF (Upper-/Lower-Side MOSFET)
Rev. B | Page 28 of 44
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| ADP1871-1.0-EVALZ | 功能描述:BOARD EVAL FOR ADP1871-1.0 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ADP1871ACPZ-0.3-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 10LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| ADP1871ACPZ-0.6-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 10LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| ADP1871ACPZ-1.0-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 10LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| ADP1871ARMZ-0.3-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 10-MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
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