参数资料
型号: ADP1873ARMZ-0.6-R7
厂商: Analog Devices Inc
文件页数: 19/40页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 10-MSOP
标准包装: 1
PWM 型: 电流模式
输出数: 1
频率 - 最大: 600kHz
占空比: 65%
电源电压: 2.75 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)
包装: 标准包装
产品目录页面: 792 (CN2011-ZH PDF)
其它名称: ADP1873ARMZ-0.6-R7DKR
Data Sheet
PROGRAMMING RESISTOR (RES) DETECT CIRCUIT
Upon startup, one of the first blocks to become active is the RES
detect circuit. This block powers up before soft start begins. It
forces a 0.4 V reference value at the DRVL output (see Figure 67)
and is programmed to identify four possible resistor values: 47 kΩ,
22 kΩ, open, and 100 kΩ.
The RES detect circuit digitizes the value of the resistor at the
DRVL pin (Pin 6). An internal ADC outputs a 2-bit digital code
that is used to program four separate gain configurations in the
current-sense amplifier (see Figure 68). Each configuration
corresponds to a current-sense gain (A CS ) of 3 V/V, 6 V/V, 12 V/V,
24 V/V, respectively (see Table 5 and Table 6). This variable is used
for the valley current-limit setting, which sets up the appropriate
current-sense gain for a given application and sets the compensation
necessary to achieve loop stability (see the Valley Current-Limit
ADP1872/ADP1873
VALLEY CURRENT-LIMIT SETTING
The architecture of the ADP1872/ADP1873 is based on valley
current-mode control. The current limit is determined by three
components: the R ON of the lower side MOSFET, the error amplifier
output voltage swing (COMP), and the current-sense gain. The
COMP range is internally fixed at 1.4 V. The current-sense gain
is programmable via an external resistor at the DRVL pin (see
the Programming Resistor (RES) Detect Circuit section). The
R ON of the lower side MOSFET can vary over temperature and
usually has a positive T C (meaning that it increases with
temperature); therefore, it is recommended to program the
current-sense gain resistor based on the rated R ON of the
MOSFET at 125°C.
Because the ADP1872/ADP1873 are based on valley current
control, the relationship between I CLIM and I LOAD is
I CLIM ? I LOAD ? ? ? 1 ?
K I ?
2 ?
Setting and Compensation Network sections).
ADP1872
Q1
?
?
DRVH
SW
DRVL
Q2
where:
I CLIM is the desired valley current limit.
I LOAD is the current load.
K I is the ratio between the inductor ripple current and the
CS GAIN
R RES
desired average load current (see Figure 10). Establishing K I
PROGRAMMING
Figure 67. Programming Resistor Location
helps to determine the inductor value (see the Inductor
Selection section), but in most cases, K I = 0.33.
CS
AMP
SW
PGND
RIPPLE CURRENT =
I LOAD
3
CS GAIN SET
DRVL
ADC
0.4V
LOAD CURRENT
VALLEY CURRENT LIMIT
Figure 69. Valley Current Limit to Average Current Relation
RES
Figure 68. RES Detect Circuit for Current-Sense Gain Programming
When the desired valley current limit (I CLIM ) has been determined,
the current-sense gain can be calculated by
Table 5. Current-Sense Gain Programming
Resistor A CS (V/V)
I CLIM ?
1 . 4 V
A CS ? R ON
47 kΩ
22 kΩ
Open
100 kΩ
3
6
12
24
where:
A CS is the current-sense gain multiplier (see Table 5 and Table 6).
R ON is the channel impedance of the lower side MOSFET.
Although the ADP1872/ADP1873 have only four discrete current-
sense gain settings for a given R ON variable, Table 6 and Figure 70
outline several available options for the valley current setpoint
based on various R ON values.
Rev. B | Page 19 of 40
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