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参数资料
| 型号： | ADP1873ARMZ-0.6-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 25/40页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 10-MSOP |
| 标准包装： | 1 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 600kHz |
| 占空比： | 65% |
| 电源电压： | 2.75 V ~ 20 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 包装： | 标准包装 |
| 产品目录页面： | 792 (CN2011-ZH PDF) |
| 其它名称： | ADP1873ARMZ-0.6-R7DKR |
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Data Sheet
ADP1872/ADP1873
EFFICIENCY CONSIDERATION
One of the important criteria to consider in constructing a dc-to-dc
converter is efficiency. By definition, efficiency is the ratio of the
output power to the input power. For high power applications at
load currents up to 20 A, the following are important MOSFET
parameters that aid in the selection process:
800
720
640
560
480
V DD = 2.7V
V DD = 3.6V
V DD = 5.5V
?
?
V GS (TH) : the MOSFET support voltage applied between the
gate and the source.
R DS (ON) : the MOSFET on resistance during channel
400
320
240
?
?
conduction.
Q G : the total gate charge
C N1 : the input capacitance of the upper side switch
160
80
300
400
500
600
700
800
+125°C
+25°C
–40°C
900 1000
?
C N2 : the input capacitance of the lower side switch
FREQUENCY (kHz)
The following are the losses experienced through the external
component during normal switching operation:
Figure 80. Internal Rectifier Voltage Drop vs. Switching Frequency
MOSFET Switching Loss
?
?
?
?
?
Channel conduction loss (both the MOSFETs)
MOSFET driver loss
MOSFET switching loss
Body diode conduction loss (lower side MOSFET)
Inductor loss (copper and core loss)
The SW node transitions due to the switching activities of the
upper side and lower side MOSFETs. This causes removal and
replenishing of charge to and from the gate oxide layer of the
MOSFET, as well as to and from the parasitic capacitance
associated with the gate oxide edge overlap and the drain and
source terminals. The current that enters and exits these charge
Channel Conduction Loss
During normal operation, the bulk of the loss in efficiency is due
to the power dissipated through MOSFET channel conduction.
Power loss through the upper side MOSFET is directly proportional
to the duty cycle (D) for each switching period, and the power
loss through the lower side MOSFET is directly proportional to
1 ? D for each switching period. The selection of MOSFETs is
governed by the amount of maximum dc load current that the
converter is expected to deliver. In particular, the selection of
the lower side MOSFET is dictated by the maximum load
current because a typical high current application employs duty
paths presents additional loss during these transition times.
This can be approximately quantified by using the following
equation, which represents the time in which charge enters and
exits these capacitive regions.
t SW-TRANS = R GATE × C TOTAL
where:
R GATE is the gate input resistance of the MOSFET.
C TOTAL is the C GD + C GS of the external MOSFET used.
The ratio of this time constant to the period of one switching cycle
is the multiplying factor to be used in the following expression:
cycles of less than 50%. Therefore, the lower side MOSFET is in
the on state for most of the switching period.
P SW ( LOSS ) ?
t SW - TRANS
t SW
? I LOAD ? VIN ? 2
P N1, N2 (CL) = [ D × R N1 (ON) + (1 ? D ) × R N2 (ON) ] × I LOAD
MOSFET Driver Loss
2
or
P SW (LOSS) = f SW × R GATE × C TOTAL × I LOAD × VIN × 2
?
? ?
Other dissipative elements are the MOSFET drivers. The
contributing factors are the dc current flowing through the
driver during operation and the Q GATE parameter of the external
MOSFETs.
P DR ( LOSS ) ? V DR ? ? f SW C upperFET V DR ? I BIAS ?
? V DD ? ? f SW C lowerFET V DD ? I BIAS ? ?
where:
C upperFET is the input gate capacitance of the upper-side MOSFET.
C lowerFET is the input gate capacitance of the lower-side MOSFET.
V DR is the driver bias voltage (that is, the low input voltage (V DD )
minus the rectifier drop (see Figure 80)).
I BIAS is the dc current flowing into the upper- and lower-side drivers.
V DD is the bias voltage.
Rev. B | Page 25 of 40
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| ADP1873ARMZ-1.0-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 10-MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ADP1873-BL1-EVZ | 功能描述:EVAL BOARD FOR ADP1873 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ADP1873-BL2-EVZ | 功能描述:EVAL BOARD FOR ADP1873 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| ADP1874 | 制造商:AD 制造商全称:Analog Devices 功能描述:Synchronous Buck Controller with Constant On-Time and Valley Current Mode |
| ADP1874-0.3-EVALZ | 功能描述:BOARD EVAL FOR ADP1874 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
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