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| 型号： | ADP1873ARMZ-0.6-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 26/40页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 10-MSOP |
| 标准包装： | 1 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 600kHz |
| 占空比： | 65% |
| 电源电压： | 2.75 V ~ 20 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 10-TFSOP，10-MSOP（0.118"，3.00mm 宽） |
| 包装： | 标准包装 |
| 产品目录页面： | 792 (CN2011-ZH PDF) |
| 其它名称： | ADP1873ARMZ-0.6-R7DKR |
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ADP1872/ADP1873
Body Diode Conduction Loss
The ADP1872/ADP1873 employ anticross conduction circuitry
that prevents the upper side and lower side MOSFETs from
conducting current simultaneously. This overlap control is
beneficial, avoiding large current flow that may lead to
irreparable damage to the external components of the power
stage. However, this blanking period comes with the trade-off of
a diode conduction loss occurring immediately after the
MOSFETs change states and continuing well into idle mode.
The amount of loss through the body diode of the lower side
MOSFET during the antioverlap state is given by
Data Sheet
INPUT CAPACITOR SELECTION
The goal in selecting an input capacitor is to reduce or to minimize
input voltage ripple and to reduce the high frequency source
impedance, which is essential for achieving predictable loop
stability and transient performance.
The problem with using bulk capacitors, other than their physical
geometries, is their large equivalent series resistance (ESR) and
large equivalent series inductance (ESL). Aluminum electrolytic
capacitors have such high ESR that they cause undesired input
voltage ripple magnitudes and are generally not effective at high
switching frequencies.
P BODY ( LOSS ) ?
t BODY ( LOSS )
t SW
? I LOAD ? V F ? 2
If bulk capacitors are to be used, it is recommended to use multi-
layered ceramic capacitors (MLCC) in parallel due to their low
1MHz
300kHz
V OUT ? ? VIN ? V OUT ?
where:
t BODY (LOSS) is the body conduction time (refer to Figure 81 for
dead time periods).
t SW is the period per switching cycle.
V F is the forward drop of the body diode during conduction.
(Refer to the selected external MOSFET data sheet for more
information about the V F parameter.)
80
+125°C
+25°C
72
–40°C
64
56
48
40
32
24
16
8
ESR values. This dramatically reduces the input voltage ripple
amplitude as long as the MLCCs are mounted directly across
the drain of the upper side MOSFET and the source terminal of
the lower side MOSFET (see the Layout Considerations section).
Improper placement and mounting of these MLCCs may cancel
their effectiveness due to stray inductance and an increase in
trace impedance.
I CIN , RMS ? I LOAD , MAX ?
V OUT
The maximum input voltage ripple and maximum input capacitor
rms current occur at the end of the duration of 1 ? D while the
upper side MOSFET is in the off state. The input capacitor rms
current reaches its maximum at time D. When calculating the
maximum input voltage ripple, account for the ESR of the input
capacitor as follows:
V MAX, RIPPLE = V RIPP + ( I LOAD, MAX × ESR )
where:
V RIPP is usually 1% of the minimum voltage input.
2.7
3.4
4.1
V DD (V)
4.8
5.5
I LOAD, MAX is the maximum load current.
ESR is the equivalent series resistance rating of the input
Figure 81. Body Diode Conduction Time vs. Low Voltage Input (V DD )
Inductor Loss
During normal conduction mode, further power loss is caused
capacitor used.
Inserting V MAX, RIPPLE into the charge balance equation to calculate
the minimum input capacitor requirement gives
by the conduction of current through the inductor windings,
which have dc resistance (DCR). Typically, larger sized inductors
have smaller DCR values.
C IN, min ?
I LOAD , MAX
V MAX , RIPPLE
?
D (1 ? D )
f SW
The inductor core loss is a result of the eddy currents generated
or
within the core material. These eddy currents are induced by the
changing flux, which is produced by the current flowing through
the windings. The amount of inductor core loss depends on the
C IN, min ?
I LOAD , MAX
4 f SW V MAX , RIPPLE
core material, the flux swing, the frequency, and the core volume.
Ferrite inductors have the lowest core losses, whereas powdered iron
where D = 50%.
P DCR (LOSS) = DCR × I LOAD + Core Loss
inductors have higher core losses. It is recommended to use shielded
ferrite core material type inductors with the ADP1872/ADP1873
for a high current, dc-to-dc switching application to achieve
minimal loss and negligible electromagnetic interference (EMI).
2
Rev. B | Page 26 of 40
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| ADP1873ARMZ-1.0-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 10-MSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:100% 电源电压:8.2 V ~ 30 V 降压:无 升压:无 回扫:是 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:是 工作温度:0°C ~ 70°C 封装/外壳:8-DIP（0.300"，7.62mm） 包装:管件 产品目录页面:1316 (CN2011-ZH PDF) |
| ADP1873-BL1-EVZ | 功能描述:EVAL BOARD FOR ADP1873 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
| ADP1873-BL2-EVZ | 功能描述:EVAL BOARD FOR ADP1873 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| ADP1874 | 制造商:AD 制造商全称:Analog Devices 功能描述:Synchronous Buck Controller with Constant On-Time and Valley Current Mode |
| ADP1874-0.3-EVALZ | 功能描述:BOARD EVAL FOR ADP1874 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 产品培训模块:Obsolescence Mitigation Program 标准包装:1 系列:True Shutdown™ 主要目的:DC/DC，步升 输出及类型:1，非隔离 功率 - 输出:- 输出电压:- 电流 - 输出:1A 输入电压:2.5 V ~ 5.5 V 稳压器拓扑结构:升压 频率 - 开关:3MHz 板类型:完全填充 已供物品:板 已用 IC / 零件:MAX8969 |
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