参数资料
型号: ADP1878ACPZ-0.6-R7
厂商: Analog Devices Inc
文件页数: 19/40页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 14LFCSP
标准包装: 1,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 600kHz
占空比: 65%
电源电压: 2.95 V ~ 20 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 14-WFDFN 裸露焊盘,CSP
包装: 带卷 (TR)
Data Sheet
ADP1878/ADP1879
Table 5. Power Input and LDO Output Configurations
VIN VREG Comments
CS
AMP
SW
>5.5 V
Float
Must use the LDO
PGND
<5.5 V
Connect to VIN
LDO drop voltage is not
realized (that is, if VIN = 2.75 V,
CS GAIN
SET
ADC
0.4V
then VREG = 2.75 V)
<5.5 V
VIN ranging
Float
Float
LDO drop is realized
LDO drop is realized, minimum
above and
below 5.5 V
VIN recommendation is 2.95 V
RES
THERMAL SHUTDOWN
Thermal shutdown is a protection feature that prevents the IC
Figure 69. RES Detect Circuit for Current Sense Gain Programming
Table 6. Current Sense Gain Programming
from damage caused by a very high operating junction temper-
ature. If the junction temperature of the device exceeds 155°C,
the device enters the thermal shutdown state. In this state, the
device shuts off both the high- and low-side MOSFETs and disables
the entire controller immediately, thus reducing the power con-
Resistor
47 kΩ
22 kΩ
Open
100 kΩ
A CS
3 V/V
6 V/V
12 V/V
24 V/V
sumption of the IC. The device resumes operation after the
junction temperature of the device cools to less than 140°C.
PROGRAMMING RESISTOR (RES) DETECT CIRCUIT
Upon startup, one of the first blocks to become active is the RES
detect circuit. This block powers up before soft start begins. It
forces a 0.4 V reference value at the RES pin (see Figure 68) and is
programmed to identify four possible resistor values: 47 kΩ, 22 kΩ,
open, and 100 kΩ.
The RES detect circuit digitizes the value of the resistor at the
RES pin (Pin 6). An internal ADC outputs a 2-bit digital code
that is used to program four separate gain configurations in the
current sense amplifier (see Figure 69). Each configuration corre-
sponds to a current sense gain (A CS ) of 3 V/V, 6 V/V, 12 V/V, or
24 V/V, respectively (see Table 6 and Table 7). This variable is used
for the valley current-limit setting, which sets up the appropriate
VALLEY CURRENT-LIMIT SETTING
The architecture of the ADP1878 / ADP1879 is based on valley
current-mode control. The current limit is determined by three
components: the R ON of the low-side MOSFET, the output voltage
swing of the current sense amplifier, and the current sense gain.
The output range of the current sense amplifier is internally
fixed at 1.4 V. The current sense gain is programmable via an
external resistor at the RES pin (see the Programming Resistor
(RES) Detect Circuit section). The R ON of the low-side MOSFET
can vary over temperature and usually has a positive T C (meaning
that it increases with temperature); therefore, it is recommended to
program the current sense, gain resistor based on the rated R ON of
the MOSFET at 125°C.
Because the ADP1878 / ADP1879 are based on valley current
control, the relationship between I CLIM and I LOAD is
current sense gain for a given application and sets the compensation
necessary to achieve loop stability (see the Valley Current-Limit
Setting section and the Compensation Network section).
where:
1
2
K I is the ratio between the inductor ripple current and the
DRVH
SW
DRVL
Q1
Q2
desired average load current (see Figure 70).
I CLIM is the desired valley current limit.
I LOAD is the current load.
Establishing K I helps to determine the inductor value (see the
RES
CS GAIN
PROGRAMMING
Inductor Selection section), but in most cases, K I = 0.33.
Figure 68. Programming Resistor Location
RIPPLE CURRENT =
I LOAD
3
LOAD CURRENT
VALLEY CURRENT LIMIT
Figure 70. Valley Current Limit to Average Current Relation
Rev. B | Page 19 of 40
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