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参数资料
| 型号： | ADP1878ACPZ-0.6-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 26/40页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 14LFCSP |
| 标准包装： | 1,500 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 600kHz |
| 占空比： | 65% |
| 电源电压： | 2.95 V ~ 20 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 14-WFDFN 裸露焊盘，CSP |
| 包装： | 带卷 (TR) |
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ADP1878/ADP1879
Data Sheet
EFFICIENCY CONSIDERATION
An important criteria to consider in constructing a dc-to-dc
converter is efficiency. By definition, efficiency is the ratio of the
output power to the input power. For high power applications at
load currents of up to 20 A, the following are important MOSFET
parameters that aid in the selection process:
800
720
640
560
480
V REG = 2.7V
V REG = 3.6V
V REG = 5.5V
?
?
V GS (TH) is the MOSFET voltage applied between the gate
and the source that starts channel conduction.
R DS (ON) is the on resistance of the MOSFET during channel
400
320
?
?
?
conduction.
Q G is the total gate charge.
C N1 is the input capacitance of the high-side switch.
C N2 is the input capacitance of the low-side switch.
240
160
80
300
400
500
600
700
800
+125°C
+25°C
–40°C
900 1000
The following are the losses experienced through the external
component during normal switching operation:
SWITCHING FREQUENCY (kHz)
Figure 83. Internal Rectifier Voltage Drop vs. Switching Frequency
?
?
?
?
?
Channel conduction loss (both of the MOSFETs).
MOSFET driver loss.
MOSFET switching loss.
Body diode conduction loss (low-side MOSFET).
Inductor loss (copper and core loss).
MOSFET Switching Loss
The SW node transitions due to the switching activities of the
high- and low-side MOSFETs. This causes removal and reple-
nishing of charge to and from the gate oxide layer of the MOSFET,
as well as to and from the parasitic capacitance associated with
Channel Conduction Loss
During normal operation, the bulk of the loss in efficiency is due
to the power dissipated through MOSFET channel conduction.
Power loss through the high-side MOSFET is directly proportional
to the duty cycle (D) for each switching period, and the power
loss through the low-side MOSFET is directly proportional to
1 ? D for each switching period. The selection of MOSFETs is
governed by the maximum dc load current that the converter is
expected to deliver. In particular, the selection of the low-side
MOSFET is dictated by the maximum load current because a
typical high current application employs duty cycles of less than
the gate oxide edge overlap and the drain and source terminals.
The current that enters and exits these charge paths presents
additional loss during these transition times. This can be approxi-
mately quantified by using the following equation, which represents
the time in which charge enters and exits these capacitive regions:
t SW-TRANS = R GATE × C TOTAL
where:
C TOTAL is the C GD + C GS of the external MOSFET.
R GATE is the gate input resistance of the external MOSFET.
The ratio of this time constant to the period of one switching cycle
is the multiplying factor to be used in the following expression:
50%. Therefore, the low-side MOSFET is in the on state for
most of the switching period.
-TRANS
2
1 , 2
1
1
2
or
MOSFET Driver Loss
Other dissipative elements are the MOSFET drivers. The con-
tributing factors are the dc current flowing through the driver
during operation and the Q GATE parameter of the external MOSFETs.
P DR(LOSS) = [ V DR × ( f SW C upperFET V DR + I BIAS )] + [ V REG ×
( f SW C lowerFET V REG + I BIAS )]
where:
C upperFET is the input gate capacitance of the high-side MOSFET.
C lowerFET is the input gate capacitance of the low-side MOSFET.
I BIAS is the dc current flowing into the high- and low-side drivers.
P SW(LOSS) = f SW × R GATE × C TOTAL × I LOAD × V IN × 2
Body Diode Conduction Loss
The ADP1878 / ADP1879 employ anti cross conduction circuitry
that prevents the high- and low-side MOSFETs from conducting
current simultaneously. This overlap control is beneficial, avoiding
large current flow that may lead to irreparable damage to the
external components of the power stage. However, this blanking
period comes with the trade-off of a diode conduction loss
occurring immediately after the MOSFETs change states and
continuing well into idle mode.
V DR is the driver bias voltage (that is, the low input voltage ( V REG )
minus the rectifier drop (see Figure 83)).
V REG is the bias voltage.
Rev. B | Page 26 of 40
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| ADP1878ACPZ-1.0-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 14LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR) |
| ADP1879-0.3-EVALZ | 功能描述:BOARD EVAL FOR ADP1879-0.3 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| ADP1879-0.6-EVALZ | 功能描述:BOARD EVAL FOR ADP1879-0.6 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| ADP1879-1.0-EVALZ | 功能描述:BOARD EVAL FOR ADP1879-1.0 RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:* 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
| ADP1879ACPZ-0.3-R7 | 功能描述:IC REG CTRLR BUCK PWM CM 14LFCSP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 特色产品:LM3753/54 Scalable 2-Phase Synchronous Buck Controllers 标准包装:1 系列:PowerWise® PWM 型:电压模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.5 V ~ 18 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-5°C ~ 125°C 封装/外壳:32-WFQFN 裸露焊盘 包装:Digi-Reel® 产品目录页面:1303 (CN2011-ZH PDF) 其它名称:LM3754SQDKR |
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