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参数资料
| 型号： | ADP2164ACPZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 15/20页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 4A 16LFCSP |
| 标准包装： | 1 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.6 V ~ 6.5 V |
| 输入电压： | 2.7 V ~ 6.5 V |
| PWM 型： | 电流模式 |
| 频率 - 开关： | 500kHz ~ 1.4MHz |
| 电流 - 输出： | 4A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-WQFN 裸露焊盘，CSP |
| 包装： | 标准包装 |
| 供应商设备封装： | 16-LFCSP-WQ（4x4） |
| 其它名称： | ADP2164ACPZ-R7DKR |
Data Sheet
POWER GOOD
PGOOD is an active high, open-drain output and requires a
resistor to pull it up to the logic supply voltage. PGOOD high
indicates that the voltage on the FB pin (and, therefore, the
output voltage) is within 10% of the desired value. PGOOD low
indicates the opposite. There is a 16-cycle waiting period after
the FB voltage is detected as being out of bounds. If FB returns
to within the ±10% range, it is ignored by the PGOOD circuitry.
CURRENT LIMIT AND SHORT-CIRCUIT PROTECTION
The ADP2164 has a peak current limit protection circuit to
prevent current runaway. The peak current limit is 6.2 A. When
the inductor current reaches the peak current limit, the high-side
MOSFET turns off and the low-side MOSFET turns on until the
next cycle begins.
The overcurrent counter is incremented by 1 at each peak
current limit event. If the overcurrent counter exceeds 10, the
part enters hiccup mode, and the high-side FET and low-side
FET are both turned off. The part remains in this mode for
4096 clock cycles and then attempts to restart using soft start.
If the current limit fault has cleared, the part resumes normal
operation. If the current limit fault has not cleared, the part
reenters hiccup mode after first counting 10 current limit
violations.
ADP2164
OVERVOLTAGE PROTECTION (OVP)
Overvoltage protection (OVP) circuitry is integrated in the
a comparator through the FB pin, which is at 0.6 V (typical)
under normal operation. The comparator is activated when the
FB voltage exceeds 0.66 V (typical), thus indicating an output
overvoltage condition. If the voltage remains above the OVP
threshold for 16 clock cycles, the high-side MOSFET turns off
and the low-side MOSFET turns on until the current through it
reaches the ?1.3 A current limit. Both MOSFETs remain in the
off state until FB falls below 0.54 V (typical), after which the
part restarts. The behavior of PGOOD under this condition is
described in the Power Good section.
UNDERVOLTAGE LOCKOUT (UVLO)
Undervoltage lockout (UVLO) circuitry is integrated in the
shuts down, and both the power switch and the synchronous
rectifier turn off. When the voltage rises above 2.6 V again,
the soft start is initiated, and the part is enabled.
THERMAL SHUTDOWN
If the ADP2164 junction temperature rises above 140°C, the
thermal shutdown circuit turns off the regulator. Extreme junc-
tion temperatures can be the result of high current operation,
poor circuit board design, and/or high ambient temperature.
When thermal shutdown occurs, a 15°C hysteresis ensures that
the ADP2164 does not return to operation until the on-chip
temperature falls below 125°C. Soft start is initiated when the
part comes out of thermal shutdown.
Rev. A | Page 15 of 20
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| ADP2164-EVALZ | 功能描述:BOARD EVAL REG DC-DC 6.5V 4A RoHS:是 类别:编程器，开发系统 >> 评估板 - DC/DC 与 AC/DC（离线）SMPS 系列:- 标准包装:1 系列:- 主要目的:DC/DC，步降 输出及类型:1，非隔离 功率 - 输出:- 输出电压:3.3V 电流 - 输出:3A 输入电压:4.5 V ~ 28 V 稳压器拓扑结构:降压 频率 - 开关:250kHz 板类型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名称:497-12113STEVAL-ISA094V1-ND |
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