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参数资料
| 型号： | ADP2301-EVALZ |
| 厂商： | Analog Devices Inc |
| 文件页数： | 14/28页 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR ADP2301 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 1，非隔离 |
| 输出电压： | 3.3V |
| 电流 - 输出： | 1.2A |
| 输入电压： | 3 ~ 20 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 1.4MHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | ADP2301 |
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ADP2300/ADP2301
THEORY OF OPERATION
The ADP2300/ADP2301 are nonsynchronous, step-down
dc-to-dc regulators, each with an integrated high-side power
MOSFET. A high switching frequency and ultrasmall, 6-lead
TSOT package allow small step-down dc-to-dc regulator
solutions.
The ADP2300/ADP2301 can operate with an input voltage from
3.0 V to 20 V while regulating an output voltage down to 0.8 V.
The ADP2300/ADP2301 are available in two fixed-frequency
options: 700 kHz (ADP2300) and 1.4 MHz (ADP2301).
BASIC OPERATION
The ADP2300/ADP2301 use the fixed-frequency, peak current-
mode PWM control architecture at medium to high loads, but
shift to a pulse-skip mode control scheme at light loads to reduce
the switching power losses and improve efficiency. When the
devices operate in fixed-frequency PWM mode, output regulation
is achieved by controlling the duty cycle of the integrated MOSFET.
When the devices operate in pulse-skip mode at light loads, the
output voltage is controlled in a hysteretic manner with higher
output ripple. In this mode of operation, the regulator periodically
stops switching for a few cycles, thus keeping the conversion
losses minimal to improve efficiency.
PWM MODE
In PWM mode, the ADP2300/ADP2301 operate at a fixed
frequency, set by an internal oscillator. At the start of each
oscillator cycle, the MOSFET switch is turned on, sending a
positive voltage across the inductor. The inductor current
increases until the current-sense signal crosses the peak
inductor current threshold that turns off the MOSFET switch;
this threshold is set by the error amplifier output. During the
MOSFET off time, the inductor current declines through the
external diode until the next oscillator clock pulse starts a new
cycle. The ADP2300/ADP2301 regulate the output voltage by
adjusting the peak inductor current threshold.
POWER SAVING MODE
To achieve higher efficiency, the ADP2300/ADP2301 smoothly
transition to the pulse-skip mode when the output load decreases
below the pulse-skip current threshold. When the output voltage
dips below regulation, the ADP2300/ADP2301 enter PWM mode
for a few oscillator cycles until the voltage increases to within
regulation. During the idle time between bursts, the MOSFET
switch is turned off, and the output capacitor supplies all the
output current.
Data Sheet
Since the pulse-skip mode comparator monitors the internal
compensation node, which represents the peak inductor current
information, the average pulse-skip load current threshold depends
on the input voltage (V IN ), the output voltage (V OUT ), the inductor,
and the output capacitor.
Because the output voltage occasionally dips below regulation
and then recovers, the output voltage ripple in the power saving
mode is larger than the ripple in the PWM mode of operation.
BOOTSTRAP CIRCUITRY
The ADP2300/ADP2301 each have an integrated boot regulator,
which requires that a 0.1 μF ceramic capacitor (X5R or X7R) be
placed between the BST and SW pins to provide the gate drive
voltage for the high-side MOSFET. There must be at least a 1.2 V
difference between the BST and SW pins to turn on the high-side
MOSFET. This voltage should not exceed 5.5 V in case the BST
pin is supplied with an external voltage source through a diode.
The ADP2300/ADP2301 generate a typical 5.0 V bootstrap voltage
for a gate drive circuit by differentially sensing and regulating the
voltage between the BST and SW pins. A diode integrated on the
chip blocks the reverse voltage between the VIN and BST pins
when the MOSFET switch is turned on.
PRECISION ENABLE
The ADP2300/ADP2301 feature a precision enable circuit that
has a 1.2 V reference voltage with 100 mV hysteresis. When the
voltage at the EN pin is greater than 1.2 V, the part is enabled. If the
EN voltage falls below 1.1 V, the chip is disabled. The precision
enable threshold voltage allows the ADP2300/ADP2301 to be
easily sequenced from other input/output supplies. It can also be
used as programmable UVLO input by using a resistive divider.
An internal 1.2 μA pull-down current prevents errors if the EN pin
is floating.
INTEGRATED SOFT START
The ADP2300/ADP2301 include internal soft start circuitry
that ramps the output voltage in a controlled manner during
startup, thereby limiting the inrush current. The soft start time is
typically fixed at 1460 μs for the ADP2300 and at 730 μs for the
ADP2301.
CURRENT LIMIT
The ADP2300/ADP2301 include current-limit protection circuitry
to limit the amount of positive current flowing through the high-
side MOSFET switch. The positive current limit on the power
switch limits the amount of current that can flow from the input
to the output.
Rev. C | Page 14 of 28
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADP2302 | 制造商:AD 制造商全称:Analog Devices 功能描述:Quad-Channel, 12-Bit, Serial Input, 4 mA to 20 mA |
| ADP2302_12 | 制造商:AD 制造商全称:Analog Devices 功能描述:2 A/3 A, 20 V, 700 kHz, Nonsynchronous Step-Down Regulators |
| ADP2302ARDZ | 功能描述:IC REG BUCK ADJ 2A 8SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:250 系列:- 类型:降压（降压） 输出类型:固定 输出数:1 输出电压:1.2V 输入电压:2.05 V ~ 6 V PWM 型:电压模式 频率 - 开关:2MHz 电流 - 输出:500mA 同步整流器:是 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:6-UFDFN 包装:带卷 (TR) 供应商设备封装:6-SON（1.45x1） 产品目录页面:1032 (CN2011-ZH PDF) 其它名称:296-25628-2 |
| ADP2302ARDZ-2.5 | 制造商:Analog Devices 功能描述: |
| ADP2302ARDZ-2.5-R7 | 功能描述:IC REG BUCK 2.5V 2A 8SOIC RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 开关稳压器 系列:- 标准包装:500 系列:- 类型:切换式电容器（充电泵），反相 输出类型:固定 输出数:1 输出电压:-3V 输入电压:2.3 V ~ 5.5 V PWM 型:Burst Mode? 频率 - 开关:900kHz 电流 - 输出:100mA 同步整流器:无 工作温度:-40°C ~ 85°C 安装类型:表面贴装 封装/外壳:SOT-23-6 细型，TSOT-23-6 包装:带卷 (TR) 供应商设备封装:TSOT-23-6 其它名称:LTC1983ES6-3#TRMTR |
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