参数资料
型号: ADSP-21261SKBCZ150
厂商: Analog Devices Inc
文件页数: 44/44页
文件大小: 0K
描述: IC DSP 32BIT 150MHZ 136-CSPBGA
产品培训模块: SHARC Processor Overview
标准包装: 1
系列: SHARC®
类型: 浮点
接口: DAI,SPI
时钟速率: 150MHz
非易失内存: ROM(384 kB)
芯片上RAM: 128kB
电压 - 输入/输出: 3.30V
电压 - 核心: 1.20V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 136-LFBGA,CSPBGA
供应商设备封装: 136-CSPBGA(12x12)
包装: 托盘
ADSP-21261
Rev. 0
|
Page 9 of 44
|
March 2006
complexity, this capability can have increasing significance on
the designer’s development schedule, increasing productivity.
Statistical profiling enables the programmer to nonintrusively
poll the processor as it is running the program. This feature,
unique to VisualDSP++, enables the software developer to pas-
sively gather important code execution metrics without
interrupting the real-time characteristics of the program. Essen-
tially, the developer can identify bottlenecks in software quickly
and efficiently. By using the profiler, the programmer can focus
on those areas in the program that impact performance and take
corrective action.
Debugging both C/C++ and assembly programs with the
VisualDSP++ debugger, programmers can:
View mixed C/C++ and assembly code (interleaved source
and object information)
Insert breakpoints
Set conditional breakpoints on registers, memory,
and stacks
Trace instruction execution
Perform linear or statistical profiling of program execution
Fill, dump, and graphically plot the contents of memory
Perform source level debugging
Create custom debugger windows
The VisualDSP++ IDDE lets programmers define and manage
DSP software development. Its dialog boxes and property pages
let programmers configure and manage all of the SHARC devel-
opment tools, including the color syntax highlighting in the
VisualDSP++ editor. This capability permits programmers to:
Control how the development tools process inputs and
generate outputs
Maintain a one-to-one correspondence with the tools’
command line switches
The VisualDSP++ Kernel (VDK) incorporates scheduling and
resource management tailored specifically to address the mem-
ory and timing constraints of DSP programming. These
capabilities enable engineers to develop code more effectively,
eliminating the need to start from the very beginning when
developing new application code. The VDK features include
threads, critical and unscheduled regions, semaphores, events,
and device flags. The VDK also supports priority-based, pre-
emptive, cooperative, and time-sliced scheduling approaches. In
addition, the VDK was designed to be scalable. If the application
does not use a specific feature, the support code for that feature
is excluded from the target system.
Because the VDK is a library, a developer can decide whether to
use it or not. The VDK is integrated into the VisualDSP++
development environment, but can also be used via standard
command line tools. When the VDK is used, the development
environment assists the developer with many error-prone tasks
and assists in managing system resources, automating the gen-
eration of various VDK-based objects, and visualizing the
system state, when debugging an application that uses the VDK.
VisualDSP++ Component Software Engineering (VCSE) is
Analog Devices’ technology for creating, using, and reusing
software components (independent modules of substantial
functionality) to quickly and reliably assemble software applica-
tions. It also is used for downloading components from the
Web, dropping them into the application, and publishing com-
ponent archives from within VisualDSP++. VCSE supports
component implementation in C/C++ or assembly language.
Use the expert linker to visually manipulate the placement of
code and data on the embedded system. View memory utiliza-
tion in a color-coded graphical form, easily move code and data
to different areas of the DSP or external memory with a drag of
the mouse, and examine runtime stack and heap usage. The
expert linker is fully compatible with existing linker definition
file (LDF), allowing the developer to move between the graphi-
cal and textual environments.
In addition to the software and hardware development tools
available from Analog Devices, third parties provide a wide
range of tools supporting the SHARC processor family. Hard-
ware tools include SHARC processor PC plug-in cards. Third-
party software tools include DSP libraries, real-time operating
systems, and block diagram design tools.
相关PDF资料
PDF描述
ADSP-21368KBPZ-3A IC DSP 32BIT 400MHZ 256BGA
ADSP-21371BSWZ-2B IC DSP 32BIT 266MHZ 208-LQFP
ADSP-21469BBCZ-3 IC DSP 32/40BIT 400MHZ 324BGA
ADSP-21479BBCZ-2A IC DSP SHARC 266MHZ LP 196CSPBGA
ADSP-21479KBCZ-3A IC DSP SHARK 300MHZ 196CSPBGA
相关代理商/技术参数
参数描述
ADSP-21261SKSTZ150 功能描述:IC DSP 32BIT 150MHZ 144LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - DSP(数字式信号处理器) 系列:SHARC® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI,以太网,RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA,FCBGA 供应商设备封装:431-FCPBGA(20x20) 包装:托盘
ADSP-21262 制造商:AD 制造商全称:Analog Devices 功能描述:SHARC Processor
ADSP-21262_05 制造商:AD 制造商全称:Analog Devices 功能描述:Embedded Processor
ADSP-21262KSTZ200 制造商:Analog Devices 功能描述:- Trays
ADSP-21262SBBC-150 功能描述:IC DSP 32BIT 150MHZ 136-CSPBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - DSP(数字式信号处理器) 系列:SHARC® 标准包装:2 系列:StarCore 类型:SC140 内核 接口:DSI,以太网,RS-232 时钟速率:400MHz 非易失内存:外部 芯片上RAM:1.436MB 电压 - 输入/输出:3.30V 电压 - 核心:1.20V 工作温度:-40°C ~ 105°C 安装类型:表面贴装 封装/外壳:431-BFBGA,FCBGA 供应商设备封装:431-FCPBGA(20x20) 包装:托盘