参数资料
型号: ADSP-BF527BBCZ-5A
厂商: Analog Devices Inc
文件页数: 30/88页
文件大小: 0K
描述: IC DSP 16BIT 533MHZ 208CSPBGA
产品变化通告: Datasheet Specification Change 14/Dec/2009
标准包装: 1
系列: Blackfin®
类型: 定点
接口: DMA,以太网,I²C,PPI,SPI,SPORT,UART,USB
时钟速率: 533MHz
非易失内存: ROM(32 kB)
芯片上RAM: 132kB
电压 - 输入/输出: 1.8V,2.5V,3.3V
电压 - 核心: 1.15V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 208-LFBGA,CSPBGA
供应商设备封装: 208-CSPBGA
包装: 托盘
配用: EVAL-SDP-CB1Z-ND - BOARD EVALUATION FOR SDP-CB1
ADZS-BF527-MPSKIT-ND - BOARD EVAL MEDIA PLAYER BF527
ADZS-BF527-EZLITE-ND - BOARD EVAL ADSP-BF527
ADSP-BF522/ADSP-BF523/ADSP-BF524/ADSP-BF525/ADSP-BF526/ADSP-BF527
OPERATING CONDITIONS FOR ADSP-BF523/ADSP-BF525/ADSP-BF527 PROCESSORS
Parameter
Conditions Min
Nominal
Max
Unit
V DDINT
Internal Supply Voltage 1
Nonautomotive models 2
0.95
1.26
V
Automotive 533 MHz models 1.093
V DDINT
Internal Supply Voltage 1
3
1.15
1.26
V
V DDINT
V DDEXT
Internal Supply Voltage 1
External Supply Voltage 4, 5
Automotive 400 MHz models 3
Nonautomotive models,
1.045
1.7
1.10
1.8
1.20
1.9
V
V
Internal Voltage Regulator
Disabled
V DDEXT
V DDEXT
V DDEXT
V DDRTC
V DDRTC
V DDMEM
V DDMEM
V DDMEM
V DDMEM
V DDOTP
V PPOTP
V DDUSB
V IH
V IH
V IH
V IHTWI
V IL
V IL
V IL
V ILTWI
T J
External Supply Voltage 4, 5
External Supply Voltage 4, 5
External Supply Voltage 4, 5
RTC Power Supply Voltage 6
RTC Power Supply Voltage 6
MEM Supply Voltage 4, 7
MEM Supply Voltage 4, 7
MEM Supply Voltage 4, 7
MEM Supply Voltage 4, 7
OTP Supply Voltage 4
OTP Programming Voltage 4
USB Supply Voltage 8
High Level Input Voltage 9, 10
High Level Input Voltage 10, 11
High Level Input Voltage 10, 11
High Level Input Voltage 12
Low Level Input Voltage 9, 10
Low Level Input Voltage 10, 11
Low Level Input Voltage 10, 11
Low Level Input Voltage
Junction Temperature
Nonautomotive models
Nonautomotive models
Automotive models
Nonautomotive models
Automotive models
Nonautomotive models
Nonautomotive models
Nonautomotive models
Automotive models
V DDEXT /V DDMEM = 1.90 V
V DDEXT /V DDMEM = 2.75 V
V DDEXT /V DDMEM = 3.6 V
V DDEXT = 1.90 V/2.75 V/3.6 V
V DDEXT /V DDMEM = 1.7 V
V DDEXT /V DDMEM = 2.25 V
V DDEXT /V DDMEM = 3.0 V
V DDEXT = Minimum
289-Ball CSP_BGA
2.25
3
2.7
2.25
2.7
1.7
2.25
3
2.7
2.25
2.25
3.0
1.1
1.7
2.0
0.7 × V BUSTWI
0
2.5
3.3
3.3
3.3
1.8
2.5
3.3
3.3
2.5
2.5
3.3
2.75
3.6
3.6
3.6
3.6
1.9
2.75
3.6
3.6
2.75
2.75
3.6
V BUSTWI
0.6
0.7
0.8
0.3 × V BUSTWI13
+105
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
°C
@ T AMBIENT = 0°C to +70°C
T J
Junction Temperature
289-Ball CSP_BGA
–40
+105
°C
@ T AMBIENT = –40°C to +70°C
T J
Junction Temperature
208-Ball CSP_BGA
0
+105
°C
@ T AMBIENT = 0°C to +70°C
T J
Junction Temperature
208-Ball CSP_BGA
–40
+105
°C
@ T AMBIENT = –40°C to +85°C
1
2
3
4
5
6
7
8
9
The voltage regulator can generate V DDINT at levels of 1.00 V to 1.20 V with –5% to +5% tolerance when VRCTL is programmed with the bfrom_SysControl() API. This
specification is only guaranteed when the API is used.
Must remain powered (even if the associated function is not used).
V DDEXT is the supply to the voltage regulator and GPIO.
If not used, power with V DDEXT .
Balls that use V DDMEM are DATA15–0, ADDR19–1, ABE1–0, ARE, AWE, AOE, AMS3–0, ARDY, SA10, SWE, SCAS, CLKOUT, SRAS, SMS, SCKE. These balls are not tolerant
to voltages higher than V DDMEM .
When not using the USB peripheral on the ADSP-BF525/ADSP-BF527 or terminating V DDUSB on the ADSP-BF523, V DDUSB must be powered by V DDEXT .
Bidirectional balls (PF15–0, PG15–0, PH15–0) and input balls (RTXI, TCK, TDI, TMS, TRST, CLKIN, RESET, NMI, and BMODE3–0) of the ADSP-BF52x processors are
2.5 V tolerant (always accept up to 2.7 V maximum V IH ). Voltage compliance (on outputs, V OH ) is limited by the V DDEXT supply voltage.
10
11
12
13
Parameter value applies to all input and bidirectional balls, except USB_DP, USB_DM, USB_VBUS, SDA, and S CL.
Bidirectional balls (PF15–0, PG15–0, PH15–0) and input balls (RTXI, TCK, TDI, TMS, TRST, CLKIN, RESET, NMI, and BMODE3–0) of the ADSP-BF52x processors are
3.3 V tolerant (always accept up to 3.6 V maximum V IH ). Voltage compliance (on outputs, V OH ) is limited by the V DDEXT supply voltage.
The V IHTWI min and max value vary with the selection in the TWI_DT field of the NONGPIO_DRIVE register. See V BUSTWI min and max values in Table 11 on Page 29 .
SDA and SCL are pulled up to V BUSTWI . See Table 11 on Page 29 .
Rev. D
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Page 30 of 88 | July 2013
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