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参数资料
| 型号： | ADSP-BF533SBBC-5V |
| 厂商： | Analog Devices Inc |
| 文件页数： | 3/64页 |
| 文件大小： | 0K |
| 描述： | IC DSP CTLR DUAL 160CSPBGA |
| 产品培训模块： | Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services |
| 标准包装： | 1 |
| 系列： | Blackfin® |
| 类型： | 定点 |
| 接口： | SPI，SSP，UART |
| 时钟速率： | 533MHz |
| 非易失内存： | ROM（1 kB） |
| 芯片上RAM： | 148kB |
| 电压 - 输入/输出： | 3.30V |
| 电压 - 核心： | 1.20V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 160-LFBGA，CSPBGA |
| 供应商设备封装： | 160-CSPBGA（12x12） |
| 包装： | 托盘 |
| 配用： | ADZS-BFAUDIO-EZEXT-ND - BOARD EVAL AUDIO BLACKFIN ADZS-BFAV-EZEXT-ND - BOARD DAUGHT ADSP-BF533,37,61KIT ADZS-BF533-EZLITE-ND - KIT W/BOARD EVAL FOR ADSP-BF533 |
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ADSP-BF531 / ADSP-BF532 / ADSP-BF533
GENERAL DESCRIPTION
The ADSP-BF531/ADSP-BF532/ADSP-BF533 processors are
members of the Blackfin ? family of products, incorporating the
Analog Devices, Inc./Intel Micro Signal Architecture (MSA).
Blackfin processors combine a dual-MAC state-of-the-art signal
processing engine, the advantages of a clean, orthogonal RISC-
like microprocessor instruction set, and single instruction, mul-
tiple data (SIMD) multimedia capabilities into a single
instruction set architecture.
The ADSP-BF531/ADSP-BF532/ADSP-BF533 processors are
completely code and pin-compatible, differing only with respect
to their performance and on-chip memory. Specific perfor-
Table 1. Processor Comparison
Features
PORTABLE LOW POWER ARCHITECTURE
Blackfin processors provide world-class power management
and performance. Blackfin processors are designed in a low
power and low voltage design methodology and feature
dynamic power management—the ability to vary both the volt-
age and frequency of operation to significantly lower overall
power consumption. Varying the voltage and frequency can
result in a substantial reduction in power consumption, com-
pared with just varying the frequency of operation. This
translates into longer battery life for portable appliances.
SYSTEM INTEGRATION
The ADSP-BF531/ADSP-BF532/ADSP-BF533 processors are
highly integrated system-on-a-chip solutions for the next gener-
ation of digital communication and consumer multimedia
applications. By combining industry-standard interfaces with a
high performance signal processing core, users can develop
cost-effective solutions quickly without the need for costly
external components. The system peripherals include a UART
SPORTs
UART
SPI
GP Timers
Watchdog Timers
RTC
Parallel Peripheral Interface
GPIOs
L1 Instruction SRAM/Cache
L1 Instruction SRAM
L1 Data SRAM/Cache
2
1
1
3
1
1
1
16
16K bytes
16K bytes
16K bytes
2
1
1
3
1
1
1
16
16K bytes
32K bytes
32K bytes
2
1
1
3
1
1
1
16
16K bytes
64K bytes
32K bytes
port, an SPI port, two serial ports (SPORTs), four general-pur-
pose timers (three with PWM capability), a real-time clock, a
watchdog timer, and a parallel peripheral interface.
PROCESSOR PERIPHERALS
The ADSP-BF531/ADSP-BF532/ADSP-BF533 processors con-
tain a rich set of peripherals connected to the core via several
high bandwidth buses, providing flexibility in system configura-
tion as well as excellent overall system performance (see the
functional block diagram in Figure 1 on Page 1 ). The general-
purpose peripherals include functions such as UART, timers
with PWM (pulse-width modulation) and pulse measurement
capability, general-purpose I/O pins, a real-time clock, and a
L1 Data SRAM
L1 Scratchpad
L3 Boot ROM
4K bytes
1K bytes
32K bytes
4K bytes 4K bytes
1K bytes 1K bytes
watchdog timer. This set of functions satisfies a wide variety of
typical system support needs and is augmented by the system
expansion capabilities of the part. In addition to these general-
purpose peripherals, the processors contain high speed serial
and parallel ports for interfacing to a variety of audio, video, and
Maximum Speed Grade
Package Options:
400 MHz 400 MHz 600 MHz
modem codec functions; an interrupt controller for flexible
management of interrupts from the on-chip peripherals or
CSP_BGA
Plastic BGA
160-Ball
169-Ball
160-Ball
169-Ball
160-Ball
169-Ball
external sources; and power management control functions to
tailor the performance and power characteristics of the proces-
LQFP
176-Lead 176-Lead 176-Lead
sor and system to many application scenarios.
All of the peripherals, except for general-purpose I/O, real-time
By integrating a rich set of industry-leading system peripherals
and memory, Blackfin processors are the platform of choice for
next generation applications that require RISC-like program-
mability, multimedia support, and leading-edge signal
processing in one integrated package.
clock, and timers, are supported by a flexible DMA structure.
There is also a separate memory DMA channel dedicated to
data transfers between the processor’s various memory spaces,
including external SDRAM and asynchronous memory. Multi-
ple on-chip buses running at up to 133 MHz provide enough
bandwidth to keep the processor core running along with activ-
ity on all of the on-chip and external peripherals.
The processors include an on-chip voltage regulator in support
of the processor’s dynamic power management capability. The
voltage regulator provides a range of core voltage levels from
V DDEXT . The voltage regulator can be bypassed at the user’s
discretion.
Rev. I
|
Page 3 of 64 |
August 2013
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ADSP-BF533SBBC-C10 | 制造商:Analog Devices 功能描述: |
| ADSP-BF533SBBC-C53 | 制造商:Analog Devices 功能描述: |
| ADSP-BF533SBBC-C73 | 制造商:Analog Devices 功能描述: |
| ADSP-BF533SBBC-ENG | 制造商:Analog Devices 功能描述: |
| ADSP-BF533SBBCZ | 制造商:Analog Devices 功能描述:- Trays |
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