参数资料
型号: ADSP-BF561SKBCZ-6A
厂商: Analog Devices Inc
文件页数: 37/64页
文件大小: 0K
描述: IC DSP CTRLR 32B 600MHZ 256CPBGA
产品培训模块: Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
标准包装: 1
系列: Blackfin®
类型: 定点
接口: SPI,SSP,UART
时钟速率: 600MHz
非易失内存: 外部
芯片上RAM: 328kB
电压 - 输入/输出: 2.50V,3.30V
电压 - 核心: 1.35V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 256-BGA,CSPBGA
供应商设备封装: 256-CSPBGA(17x17)
包装: 托盘
配用: ADZS-BFAUDIO-EZEXT-ND - BOARD EVAL AUDIO BLACKFIN
ADZS-BF561-EZLITE-ND - BOARD EVAL ADSP-BF561
ADZS-BF561-MMSKIT-ND - KIT STARTER MULTIMEDIA BF561
ADZS-BFAV-EZEXT-ND - BOARD DAUGHT ADSP-BF533,37,61KIT
ADSP-BF561 
Universal Asynchronous Receiver Transmitter (UART)
Port—Receive and Transmit Timing
Figure 25 describes UART port receive and transmit operations.
The maximum baud rate is SCLK/16. As shown in Figure 25 ,
there is some latency between the generation internal UART
interrupts and the external data operations. These latencies are
negligible at the data transmission rates for the UART.
D P I _P14–1
[ R x D ]
DATA ( 5–8 )
STO P
RECEIVE
INTERNAL 
UART RECEI V E 
INTERRU P T 
t R X D
UART RECEI V E B IT SET BY DATA STO P;
CLEARED BY F I F O READ
START
D P I _P14–1
[ T x D ]
DATA ( 5–8 )
STO P ( 1–2 )
TRANSMIT
INTERNAL 
UART TRANSMIT 
INTERRU P T 
t T X D
UART TRANSMIT B IT SET BY P RO G RAM ;
CLEARED BY W RITE TO TRANSMIT
Figure 25. UART Port—Receive and Transmit Timing
Rev. E |
Page 37 of 64 |
September 2009
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ADSP-BF561SKBCZ-6A 制造商:Analog Devices 功能描述:Digital Signal Processor IC
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