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参数资料
| 型号： | ADV3003ACPZ-R7 |
| 厂商： | Analog Devices Inc |
| 文件页数： | 4/16页 |
| 文件大小： | 0K |
| 描述： | IC EQUALZR HDMI/DVI TMDS 40LFCSP |
| 标准包装： | 750 |
| 应用： | DVI，HDMI 均衡器/驱动器 |
| 接口： | TMDS |
| 电源电压： | 3 V ~ 3.6 V |
| 封装/外壳： | 40-VFQFN 裸露焊盘，CSP |
| 供应商设备封装： | 40-LFCSP-VQ（6x6） |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
ADV3003
Rev. 0 | Page 12 of 16
APPLICATION NOTES
The ADV3003 is a TMDS buffer featuring equalized inputs
and pre-emphasized outputs. It is intended for use as a buffer
in HDMI/DVI systems with long input cable runs, and is fully
HDMI 1.3 receive-compliant.
PINOUT
The ADV3003 is designed to have an HDMI/DVI receiver
pinout at its input and a transmitter pinout at its output. This
makes the ADV3003 ideal for use in advanced TV front-panel
connectors and AVR-type applications where a designer routes
both the inputs and the outputs directly to HDMI/DVI connec-
tors—all of the high speed signals can be routed on one side of
the board.
The ADV3003 provides 12 dB of input equalization, so it can
compensate for the signal degradation of long input cables.
In addition, the ADV3003 can also provide up to 6 dB of
pre-emphasis that boosts the output TMDS signals and allows
the ADV3003 to precompensate when driving long PCB traces
or high loss output cables. The net effect of the input equalization
and output pre-emphasis is that the ADV3003 can compensate
for signal degradation of both the input and output cables; it
acts to reopen a closed input data eye and transmit a full-swing
HDMI signal to an end receiver.
CABLE LENGTHS AND EQUALIZATION
The 12 dB equalizer of the ADV3003 is optimized for video
data rates of 2.25 Gbps and can equalize more than 20 meters
of 24 AWG HDMI cable at the input at 2.25 Gbps, the data rate
corresponding to the video format 1080p with 12-bit deep color.
The length of cable that can be used in a typical HDMI/DVI
application depends on a large number of factors including
Cable quality: The quality of the cable in terms of
conductor wire gauge and shielding. Thicker conductors
have lower signal degradation per unit length.
Data rate: The data rate being sent over the cable. The signal
degradation over HDMI cables increases with data rate.
Edge rates: The edge rates of the source. Slower input edges
result in more significant data eye closure at the
end of a cable.
Receiver sensitivity: The sensitivity of the terminating
receiver.
Because of these considerations, specific cable types and lengths
are not recommended for use with this equalizer. The ADV3003
equalizer does not degrade signal integrity, even for short input
cables.
PRE-EMPHASIS
The pre-emphasis of the ADV3003 acts to boost the initial
voltage swing of the output signals. Pre-emphasis provides a
distinct advantage in systems where the ADV3003 is driving
either high loss cables or long PCB traces, because the added
boost helps to ensure that the data eye at the far end of the
output cables or PCB traces meets the HDMI receive mask. The
use of pre-emphasis in a system is highly application specific.
PCB LAYOUT GUIDELINES
The ADV3003 is a 4-channel TMDS buffer, targeted for use in
HDMI and DVI video applications. Although the HDMI/DVI
link consists of four differential, high speed channels and four
single-ended, low speed auxiliary control signals, the ADV3003
buffers only the high speed signals.
The high speed signals carry the audiovisual (AV) data, which
is encoded by a technique called TMDS. For HDMI, the TMDS
data is further encrypted in accordance with the high bandwidth
digital content protection (HDCP) standard.
The TMDS signals are differential, unidirectional, and high
speed (up to 2.25 Gbps). The channels that carry the video data
must have a controlled impedance, be terminated at the receiver,
and be capable of operating up to at least 2.25 Gbps. It is especially
important to note that the PCB traces that carry the TMDS
signals should be designed with a controlled differential
impedance of 100 Ω. The ADV3003 provides single-ended
50 Ω terminations on chip for both its inputs and outputs.
Transmitter termination is not fully specified by the HDMI
standard, but its inclusion in the ADV3003 improves the
overall system signal integrity.
TMDS Signals
In the HDMI/DVI standard, four differential pairs carry the
TMDS signals. In DVI, three of these pairs are dedicated to
carrying RGB video and sync data. For HDMI, audio data is
also interleaved with the video data; the DVI standard does
not incorporate audio information. The fourth high speed
differential pair is used for the AV data-word clock, which
runs at one-tenth the speed of the video data channels.
The four high speed channels of the ADV3003 are identical.
No concession was made to lower the bandwidth of the fourth
channel for the pixel clock, so any channel can be used for any
TMDS signal; the user chooses which signal is routed over
which channel. In addition, the TMDS channels are symmetric;
therefore, the p and n of a given differential pair are inter-
changeable, provided the inversion is consistent across all
inputs and outputs of the ADV3003.
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