参数资料
型号: AGLE3000V2-FGG484I
厂商: Microsemi SoC
文件页数: 111/166页
文件大小: 0K
描述: IC FPGA 1KB FLASH 3M 484-FBGA
标准包装: 60
系列: IGLOOe
逻辑元件/单元数: 75264
RAM 位总计: 516096
输入/输出数: 341
门数: 3000000
电源电压: 1.14 V ~ 1.575 V
安装类型: 表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 484-BGA
供应商设备封装: 484-FPBGA(23x23)
IGLOOe Low Power Flash FPGAs
Revision 13
2-35
3.3 V LVCMOS Wide Range
Table 2-40 Minimum and Maximum DC Input and Output Levels
3.3 V LVCMOS Wide Range
VIL
VIH
VOL
VOH
IOL IOH IOSH
IOSL IIL1 IIH2
Drive
Strength
Equivalent
Software Default
Drive Strength
Option3
Min.
(V)
Max.
(V)
Min.
(V)
Max
(V)
Max.
(V)
Min.
(V)
A A
Max.
(mA)4
Max.
(mA)4 A5 A5
100 A
2 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
25
27
10 10
100 A
4 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
25
27
10 10
100 A
6 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
51
54
10 10
100 A
8 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
51
54
10 10
100 A
12 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
103
109
10 10
100 A
16 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
132
127
10 10
100 A
24 mA
–0.3
0.8
2
3.6
0.2
VDD – 0.2 100 100
268
181
10 10
Notes:
1. IIL is the input leakage current per I/O pin over recommended operation conditions where –0.3 V < VIN < VIL.
2. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN < VCCI . Input current is
larger when operating outside recommended ranges.
3. The minimum drive strength for any LVCMOS 3.3 V software configuration when run in wide range is ±100 A. Drive
strength displayed in the software is supported for normal range only. For a detailed I/V curve, refer to the IBIS models.
4. Currents are measured at 85°C junction temperature.
5. All LVCMOS 3.3 V software macros supports LVCMOS 3.3 V wide range as specified in the JDEC8a specification.
6. Software default selection highlighted in gray.
Table 2-41 AC Waveforms, Measuring Points, and Capacitive Loads
Input Low (V)
Input High (V)
Measuring Point* (V)
VREF (typ.) (V)
CLOAD (pF)
03.3
1.4
5
Note: *Measuring point = Vtrip. See Table 2-23 on page 2-23 for a complete table of trip points.
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