参数资料
型号: AGLP060V5-CSG201I
厂商: Microsemi SoC
文件页数: 37/134页
文件大小: 0K
描述: IC FPGA IGLOO PLUS 60K 201-CSP
标准包装: 384
系列: IGLOO PLUS
逻辑元件/单元数: 1584
RAM 位总计: 18432
输入/输出数: 157
门数: 60000
电源电压: 1.425 V ~ 1.575 V
安装类型: 表面贴装
工作温度: -40°C ~ 85°C
封装/外壳: 201-VFBGA,CSBGA
供应商设备封装: 201-CSP(8x8)
IGLOO PLUS Low Power Flash FPGAs
Revision 16
5-5
Revision
Changes
Page
Revision 10 (Apr 2009)
Product Brief v1.5
DC and Switching
Characteristics
Advance v0.5
The –F speed grade is no longer offered for IGLOO PLUS devices. References to
it have been removed from the document. The speed grade column and note
regarding –F speed grade were removed from "IGLOO PLUS Ordering
Information". The "Speed Grade and Temperature Grade Matrix" section was
removed.
Revision 9 (Feb 2009)
Product Brief v1.4
The "Advanced I/O" section was revised to add two bullets regarding support of
wide range power supply voltage.
The "I/Os with Advanced I/O Standards" section was revised to add 3.0 V wide
range to the list of supported voltages. The "Wide Range I/O Support" section is
new.
Revision 8 (Jan 2009)
Packaging v1.5
The "CS201" pin table was revised to add a note regarding pins G1 and H1.
Revision 7 (Dec 2008)
Product Brief v1.3
A note was added to IGLOO PLUS Devices: "AGLP060 in CS201 does not
support the PLL."
change the nominal size of VQ176 from 100 to 400 mm2.
Revision 6 (Oct 2008)
DC and Switching
Characteristics
Advance v0.4
Data was revised significantly in the following tables:
Revision 5 (Aug 2008)
Product Brief v1.2
The VQ128 and VQ176 packages were added to Table 1 IGLOO PLUS Product
I to IV
Packaging v1.4
The "VQ128" package drawing and pin table are new.
The "VQ176" package drawing and pin table are new.
Revision 4 (Jul 2008)
Product Brief v1.1
DC and Switching
Characteristics
Advance v0.3
As a result of the Libero IDE v8.4 release, Actel now offers a wide range of core
voltage support. The document was updated to change 1.2 V / 1.5 V to 1.2 V to
1.5 V.
N/A
Revision 3 (Jun 2008)
DC and Switching
Characteristics
Advance v0.2
Tables have been updated to reflect default values in the software. The default
I/O capacitance is 5 pF. Tables have been updated to include the LVCMOS 1.2 V
I/O set.
N/A
to add the sentence, "VCCI should be at the same voltage within a given I/O
bank." References to table notes 5, 6, 7, and 8 were added. Reference to table
note 3 was removed from VPUMP Operation and placed next to VCC.
measured on quiet I/Os" from the title. Table note 2 was revised to remove
"estimated SSO density over cycles." Table note 3 was deleted.
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AGLP060-V5CSG289ES 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:IGLOO PLUS Low-Power Flash FPGAs with FlashFreeze Technology
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