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参数资料
型号： AGLP125V2-CSG289I
厂商： Microsemi SoC
文件页数： 77/134页
文件大小： 0K
描述： IC FPGA IGLOO PLUS 125K 289-CSP
标准包装： 152
系列： IGLOO PLUS
逻辑元件/单元数： 3120
RAM 位总计： 36864
输入/输出数： 212
门数： 125000
电源电压： 1.14 V ~ 1.575 V
安装类型： 表面贴装
工作温度： -40°C ~ 85°C
封装/外壳： 289-TFBGA，CSBGA
供应商设备封装： 289-CSP（14x14）
IGLOO PLUS Low Power Flash FPGAs
Revision 16
2-33
Timing Characteristics
Applies to 1.5 V DC Core Voltage
Applies to 1.2 V DC Core Voltage
Table 2-48 2.5 V LVCMOS Low Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
4 mA
STD
0.97
4.44 0.18 1.06
1.22
0.66
4.53 4.15 1.80 1.70
ns
6 mA
STD
0.97
3.61 0.18 1.06
1.22
0.66
3.69 3.50 2.05 2.18
ns
8 mA
STD
0.97
3.61 0.18 1.06
1.22
0.66
3.69 3.50 2.05 2.18
ns
12 mA
STD
0.97
3.07 0.18 1.06
1.22
0.66
3.14 3.03 2.22 2.48
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-49 2.5 V LVCMOS High Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
4 mA
STD
0.97
2.41 0.18 1.06
1.22
0.66
2.47 2.22 1.79 1.77
ns
6 mA
STD
0.97
1.99 0.18 1.06
1.22
0.66
2.04 1.75 2.04 2.25
ns
8 mA
STD
0.97
1.99 0.18 1.06
1.22
0.66
2.04 1.75 2.04 2.25
ns
12 mA
STD
0.97
1.77 0.18 1.06
1.22
0.66
1.81 1.51 2.22 2.56
ns
Notes:
1. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
2. Software default selection highlighted in gray.
Table 2-50 2.5 LVCMOS Low Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 2.3 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
4 mA
STD
0.98
5.04 0.19 1.19
1.40
0.67
5.12 4.65 2.22 2.36
ns
6 mA
STD
0.98
4.19 0.19 1.19
1.40
0.67
4.25 3.98 2.48 2.85
ns
8 mA
STD
0.98
4.19 0.19 1.19
1.40
0.67
4.25 3.98 2.48 2.85
ns
12 mA
STD
0.98
3.63 0.19 1.19
1.40
0.67
3.69 3.50 2.66 3.16
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
Table 2-51 2.5 V LVCMOS High Slew – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 2.3 V
Drive Strength
Speed Grade
tDOUT
tDP
tDIN
tPY
tPYS
tEOUT
tZL
tZH
tLZ
tHZ
Units
4 mA
STD
0.98
2.96 0.19 1.19
1.40
0.67
3.00 2.67 2.22 2.46
ns
6 mA
STD
0.98
2.52 0.19 1.19
1.40
0.67
2.56 2.18 2.47 2.95
ns
8 mA
STD
0.98
2.52 0.19 1.19
1.40
0.67
2.56 2.18 2.47 2.95
ns
12 mA
STD
0.98
2.29 0.19 1.19
1.40
0.67
2.32 1.94 2.65 3.27
ns
Notes:
1. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.
2. Software default selection highlighted in gray.
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