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| 型号： | AN-6003 |
| 厂商： | Fairchild Semiconductor Corporation |
| 英文描述： | Shoot-through in Synchronous Buck Converters |
| 中文描述： | 拍摄通过在同步降压转换器 |
| 文件页数： | 3/6页 |
| 文件大小： | 143K |
| 代理商： | AN-6003 |
Shoot-through in Synchronous Buck Regulators
AN-6003
04/25/2003
3
When the adaptive gate circuit switches, the internal
MOSFET gate voltage will be:
(
)
V
1
5
2
+
2
2
V
1
=
+
In this example, if there were no delay in the circuit,
the HDRV would turn on when the low-side
MOSFET has just begun to discharge, causing a very
high shoot-through current.
Much of the problem in the above circuit is the
damping resistor. If a damping resistance is
necessary, place a Schottky diode across the resistor
(as shown below) to reduce the effect the damping
resistor will have on the adaptive gate drive.
R
DRIVER
R
Damping
H.S. MOSFET
1V
HDRV
LDRV
Delay
R
GATE
C
GS
C
GD
D
S
G
Q2
Figure 6. Schottky diode reduces damping
resistor error in adaptive gate drive
When using the schottky, the internal gate node will
be at:
(
)
GATE
DRIVER
DRIVER
)
GS
R
R
R
V
1
5
V
+
+
=
or 2.1V for our example. A dramatic improvement.
Furthermore, the Schottky reduces the duration of the
shoot-through step, since only R
+ R
DRIVER
will be
discharging C
GS
, rather than the sum of
R
GATE
+ R
DAMPING
+ R
DRIVER
.
Table 1 below illustrates the performance
improvement in our example with and without the
Schottky diode:
No
Schottky
4.1
2.23
2.50
36
1100
With
Schottky
2.1
1.14
1.25
0.29
20
Comparator Flips @ V
GS(INT)
=
V
GS(INT)
after 20nS delay
VSTEP Peak
Peak current
Power Loss @ F
SW
=300KHz
Conditions:
Typical low-side MOSFET, 25nS
delay from comparator sense to beginning of SW
node rise, 19V
IN
, 10nS SW node rise time.
V
V
V
A
mW
Table 1 . Peak Currents with and without
Schottky with R
DAMPING
= 5
.
MOSFET Choices
MOSFET characteristics can have a dramatic effect
on how much shoot-through current can be induced
by the gate step. The worst case for shoot-through is
an infinitely fast (0 rise time) on the drain node. The
amount of gate step is largely determined by the
ration of C
and C
. Once the size of the gate step
is determined (eq. 1 above), the peak magnitude of
the shoot-through current can be calculated as :
(
)
)
MIN
(
TH
STEP(MAX)
V
M
)
MAX
(
PEAK
I
V
G
K
≈
(2)
where G
is the transconductance (in S, or A/V)
given in the datasheet. While only a small
percentage of MOSFETs exhibit V
at room
temperature, V
goes down with increasing junction
temperature, therefore V
is a good proxy for the
V
at the operating junction temperature of the
MOSFET. Subsequent calculations use V
TH(MIN)
for
this reason.
G
is not really a contstant, however, and its value is
greatly reduced low enhancement voltages (V
-V
TH
).
In these calculations we use a factor "K" from the
graph below, which is typical of G
with low values
of enhancement. The X axis of Figure 7 is calculated
V
V
as
)
MIN
(
TH
)
MIN
(
TH
GS
V
0.0
0.2
0.4
0.6
0.8
1.0
0%
50%
Normalized Enhancement Voltage
100%
150%
200%
250%
300%
K
Figure 7 G
M
factor (K)
Table 2 shows the relevant MOSFET characteristics
which determine the maximum shoot-through
current.
MOSFET
C
GS
C
GD
Typical
V
TH
1.6
1.2
1.6
1.6
1.15
Min
V
TH
1
0.8
1
1
0.6
G
M
MOSFET1
MOSFET2
MOSFET3
MOSFET4
MOSFET5
3,514
5,070
4,942
3,888
6,324
307
230
315
401
281
86
97
80
135
90
Table 2 . Low-Side MOSFET Characteristics
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