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参数资料
型号： APA750-FG896
厂商： Microsemi SoC
文件页数： 146/178页
文件大小： 0K
描述： IC FPGA PROASIC+ 750K 896-FBGA
标准包装： 27
系列： ProASICPLUS
RAM 位总计： 147456
输入/输出数： 562
门数： 750000
电源电压： 2.3 V ~ 2.7 V
安装类型： 表面贴装
工作温度： 0°C ~ 70°C
封装/外壳： 896-BGA
供应商设备封装： 896-FBGA（31x31）
ProASICPLUS Flash Family FPGAs
v5.9
1-3
Live at Power-Up
The Actel flash-based ProASICPLUS devices support
Level 0 of the live at power-up (LAPU) classification
standard. This feature helps in system component
initialization,
executing
critical
tasks
before
the
processor wakes up, setting up and configuring memory
blocks, clock generation, and bus activity management.
The LAPU feature of flash-based ProASICPLUS devices
greatly simplifies total system design and reduces total
system cost, often eliminating the need for complex
programmable logic device (CPLD) and clock generation
PLLs that are used for this purpose in a system. In
addition, glitches and brownouts in system power will
not corrupt the ProASICPLUS device's flash configuration,
and unlike SRAM-based FPGAs, the device will not have
to be reloaded when system power is restored. This
enables the reduction or complete removal of the
configuration
PROM,
expensive
voltage
monitor,
brownout detection, and clock generator devices from
the PCB design. Flash-based ProASICPLUS devices simplify
total system design, and reduce cost and design risk,
while increasing system reliability and improving system
initialization time.
Flash Switch
Unlike SRAM FPGAs, ProASICPLUS uses a live-at-power-up
ISP flash switch as its programming element.
In the ProASICPLUS flash switch, two transistors share the
floating
gate,
which
stores
the
programming
information. One is the sensing transistor, which is only
used for writing and verification of the floating gate
voltage. The other is the switching transistor. It can be
used in the architecture to connect/separate routing nets
or to configure logic. It is also used to erase the floating
gate (Figure 1-2 on page 1-2).
Logic Tile
The logic tile cell (Figure 1-3) has three inputs (any or all
of which can be inverted) and one output (which can
connect to both ultra-fast local and efficient long-line
routing resources). Any three-input, one-output logic
function (except a three-input XOR) can be configured as
one tile. The tile can be configured as a latch with clear
or set or as a flip-flop with clear or set. Thus, the tiles can
flexibly map logic and sequential gates of a design.
Figure 1-3 Core Logic Tile
Local Routing
In 1
In 2 (CLK)
In 3 (Reset)
Efficient Long-Line Routing
相关PDF资料
PDF描述
APA750-FGG896 IC FPGA PROASIC+ 750K 896-FBGA
HSC49DRYN-S93 CONN EDGECARD 98POS DIP .100 SLD
A3PE3000L-FGG484I IC FPGA 1KB FLASH 3M 484-FBGA
170-015-172L000 CONN DB15 CRIMP MALE TIN
HSC49DRYH-S93 CONN EDGECARD 98POS DIP .100 SLD
相关代理商/技术参数
参数描述
APA750-FG896A 功能描述:IC FPGA PROASIC+ 750K 896-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASICPLUS 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP，带拉杆 供应商设备封装:352-CQFP（75x75）
APA750-FG896I 功能描述:IC FPGA PROASIC+ 750K 896-FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASICPLUS 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP，带拉杆 供应商设备封装:352-CQFP（75x75）
APA750-FGB 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC Flash Family FPGAs
APA750-FGES 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:ProASIC Flash Family FPGAs
APA750-FGG676 功能描述:IC FPGA PROASIC+ 750K 676-FBGA RoHS:是 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:ProASICPLUS 标准包装:1 系列:ProASICPLUS LAB/CLB数:- 逻辑元件/单元数:- RAM 位总计:129024 输入/输出数:248 门数:600000 电源电压:2.3 V ~ 2.7 V 安装类型:表面贴装 工作温度:- 封装/外壳:352-BFCQFP，带拉杆 供应商设备封装:352-CQFP（75x75）
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