参数资料
型号: AS1369-BWLT-33
厂商: ams
文件页数: 17/22页
文件大小: 0K
描述: IC REG LDO 3.3V .2A 4WLCSP
标准包装: 1
稳压器拓扑结构: 正,固定式
输出电压: 3.3V
输入电压: 最高 5.5V
电压 - 压降(标准): 0.08V @ 200mA
稳压器数量: 1
电流 - 输出: 200mA
电流 - 限制(最小): 210mA
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 4-UFBGA,WLCSP
供应商设备封装: 4-WLCSP
包装: 标准包装
其它名称: AS1369-BWLT-33DKR
AS1369
Datasheet
8.5 Explanation of Steady State Specifications
8.5.1
Line Regulation
Line regulation is defined as the change in output voltage when the input (or line) voltage is changed by a known quantity. It is a measure of the
regulator’s ability to maintain a constant output voltage when the input voltage changes. Line regulation is a measure of the DC open loop gain
of the error amplifier. More generally:
? V OUT
? V IN
Line Regulation = ----------------- and is a pure number
(EQ 9)
In practise, line regulation is referred to the regulator output voltage in terms of % / V OUT . This is particularly useful when the same regulator is
available with numerous output voltage trim options.
? V OUT 100
? V IN
Line Regulation = ----------------- ? ------------- % / V
V OUT
(EQ 10)
8.5.2
Load Regulation
Load regulation is defined as the change of the output voltage when the load current is changed by a known quantity. It is a measure of the
regulator’s ability to maintain a constant output voltage when the load changes. Load regulation is a measure of the DC closed loop output
resistance of the regulator. More generally:
? V OUT
? I OUT
Load Regulation = ----------------- and is units of ohms ( ? )
(EQ 11)
In practise, load regulation is referred to the regulator output voltage in terms of % / mA. This is particularly useful when the same regulator is
available with numerous output voltage trim options.
? V OUT 100
? I OUT
Load Regulation = ----------------- ? ------------- % / mA
V OUT
(EQ 12)
8.5.3
Setting Accuracy
Accuracy of the final output voltage is determined by the accuracy of the ratio of R1 and R2, the reference accuracy and the input offset voltage
of the error amplifier. When the regulator is supplied pre-trimmed, the output voltage accuracy is fully defined in the output voltage specification.
When the regulator has a SET terminal, the output voltage may be adjusted externally. In this case, the tolerance of the external resistor network
must be incorporated into the final accuracy calculation. Generally:
V OUT = ? V SET ? ? V SET ? ? ? ? ?
R 1 ? ? R 1
R 2 ? ? R 2
1 + ---------------------
The reference tolerance is given both at 25°C and over the full operating temperature range.
(EQ 13)
8.5.4
Total Accuracy
Away from dropout, total steady state accuracy is the sum of setting accuracy, load regulation and line regulation. Generally:
Total % Accuracy = Setting % Accuracy + Load Regulation % + Line Regulation %
8.6 Explanation of Dynamic Specifications
(EQ 14)
8.6.1
Power Supply Rejection Ratio (PSRR)
Known also as Ripple Rejection, this specification measures the ability of the regulator to reject noise and ripple beyond DC. PSRR is a
summation of the individual rejections of the error amplifier, reference and AC leakage through the series pass transistor. The specification, in
the form of a typical attenuation plot with respect to frequency, shows up the gain bandwidth compromises forced upon the designer in low
quiescent current conditions. Generally:
? V OUT
? V IN
PSRR = 20 Log ----------------- dB using lower case ? to indicate AC values
Power supply rejection ratio is fixed by the internal design of the regulator. Additional rejection must be provided externally.
(EQ 15)
www.austriamicrosystems.com/LDOs/AS1369
Revision 1.7
16 - 21
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