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Revision 1.11
85 - 91
AS3543 3v2
Data Sheet - R e g i s t e r D e f i n i t i o n
Table 87. RTC_Cntr Register
Name
Base
Default
RTC_Cntr
2-wire serial
03h
Offset: 28h
RTC Control Register
This register is reset at a RVDD-POR.
Bit
Bit Name
Default
Access
Bit Description
7:4
Free_Bits<3:0>
0000
R/W
Free Bits to be used for application purpose
3:2
-
00
n/a
1
RTC_ON
1
R/W
RTC counter clock control:
0: Disable clock for RTC counter
1: Enables clock for RTC counter
0
OSC_ON
1
RW
RTC oscillator control:
0: Disable RTC oscillator
1: Enable RTC oscillator
Table 88. RTC_Time Register
Name
Base
Default
RTC_time
2-wire serial
03h
Offset: 29h
RTC Timing Register
This register is reset at a RVDD-POR.
Bit
Bit Name
Default
Access
Bit Description
7
IRQ_MIN
0
R/W
0: generates an interrupt every second
1: generates an interrupt every minute
The interrupt has to be enable in IRQENRD_4 (27h)
6:0
TRTC<6:0>
1000000
R/W
These bits are used to correct the inaccuracy of the used
32kHz crystal.
Trimming register for RTC, 128 steps @ 7.6ppm
000000: 1 (7.6ppm)
000001: 2 (15.2ppm)
…
100000: 64 (488ppm)
…
111110: 126 (960.8ppm)
111111: 127 (968.4ppm)
Table 89. RTC_0 to RTC_3 Register
Name
Base
Default
RTC_0 to RTC_3
2-wire serial
03h
Offset: 2Ah to 2Dh
RTC Counter Seconds Register
This register is reset at a RVDD-POR.
Adr.
Byte Name
Default
Access
Bit Description
2Ah
RTC_0
00h
R/W
QRTC<7:0>; RTC seconds bits 0 to 7
2Bh
RTC_1
00h
R/W
QRTC<15:8>; RTC seconds bits 8 to 15
2Ch
RTC_2
00h
R/W
QRTC<23:9>; RTC seconds bits 9 to 23
2Dh
RTC_3
00h
R/W
QRTC<31:24>; RTC seconds bits 24 to 31
ams
AG
Technical
content
still
valid