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参数资料
| 型号： | AS5SS256K18DQ-9/IT |
| 厂商： | AUSTIN SEMICONDUCTOR INC |
| 元件分类： | SRAM |
| 英文描述： | 256K x 18 SSRAM Synchronous Burst SRAM, Flow-Through |
| 中文描述： | 256K X 18 STANDARD SRAM, 8.5 ns, PQFP100 |
| 封装： | TQFP-100 |
| 文件页数： | 13/13页 |
| 文件大小： | 135K |
| 代理商： | AS5SS256K18DQ-9/IT |
AS5SS256K18
Rev. 2.1 06/05
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
9
SSRAM
AS5SS256K18
Austin Semiconductor, Inc.
READ TIMING
NOTE: 1. Q(A2) referes to output from address A2. Q(A2+1) refers to output from the next internal burst address following A2.
2. CE2\ and CE2 have timing identical to CE\. On this diagram, when CE\ is LOW, CE2\ is LOW and CE2 is HIGH. When CE\ is HIGH, CE2\ is HIGH and CE2 is LOW.
3. Timing is shown assuming that the device was not enabled before entering into this sequence.
4. Outputs are disabled t
KQHZ
after deselect.
READ TIMING PARAMETERS
MIN MAX MIN MAX MIN MAX
tKC
8.8
10
15
ns
tAS
1.5
1.8
2.0
ns
tKF
113
100
66
MHz
tADSS
1.5
1.8
2.0
ns
tKH
2.5
3.0
4.0
ns
tAAS
1.5
1.8
2.0
ns
tKL
2.5
3.0
4.0
ns
tWS
1.5
1.8
2.0
ns
tKQ
7.5
8.5
10
ns
tCES
1.5
1.8
2.0
ns
tKQX
1.5
3.0
ns
tAH
0.5
ns
tKQLZ
1.5
3.0
ns
tADSH
0.5
ns
tKQHZ
4.2
5.0
ns
tAAH
0.5
ns
tOEQ
4.2
5.0
ns
tWH
0.5
ns
tOELZ
000
ns
tCEH
0.5
ns
tOEHZ
4.2
5.0
ns
-10
-9
-8
SYM
-10
UNITS
SYM
-8
-9
1234567890123
1234
123456789
1234
12345
123456
1234567890123456
12345
123456789
12345
1234567
1
CLK
ADSP\
ADSC\
○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○
○○○○○○
○○○○○○○○○○○○○○○
○○○○○○○○○○○○○○○○○○○○○○○○○
○○○○○○○○○○○○○○○○○○○○○
○
○○○○○○○○○○○○○○○○○○○
○○○○○○
○
○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○
○○○○
○
○○○○○○○○○○○○○○○○○○○○○○○○○○○○○
○
○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○
○○○○○○○○○○
○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○
○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○
○○○○○○○○○
○
○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○
○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○
○○○○○○○
ADDRESS
A2
BWE\, GW\,
BWa\-BWb\
○
○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○○
CE\
(Note 2)
ADV\
OE\
SINGLE READ
BURST
READ
○○○○○○○○○○○○○○
○
○○○○○○○○○○○○○○○○○○○○○○
Q
12345
A1
12345678
123
12345678
12345678901234567890123456789012123456789012345678901234567890121234567890123456789
12
Q(A2)
Q(A2+2)
12
Q(A2+3)
12
Q(A2)
123
Q(A2+1)
12
Q(A2+2)
123456
1234567
123456
12345
123456
12345
123456
12345678
12
123456
12345
123456
Q(A1)
Q(A2+1)
123456
1234567
123456
1234567890123456789012
12
123456
12345
123456
123456789012345678901234567890121234567890123456789012345678901212345678901234567
123456
1234567890123456789012
12
123456789012
123456
1
123
1234
t
ADSS
t
ADSH
123456
t
AS
t
AH
t
KC
t
KL
t
KH
t
ADSS
t
ADSH
t
WS tWH
t
CES tCEH
123456
t
AAS
t
AAH
ADV\ suspends burst.
High-Z
t
OEHZ
t
KQLZ
t
KQ
t
OEQ
t
OELZ
t
KQ
t
KQX
t
KQHZ
Burst wraps around
to its initial state.
(NOTE 1)
Deselect Cycle
(Note 4)
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