参数资料
型号: AT45DB011B-XU
厂商: Atmel
文件页数: 2/32页
文件大小: 0K
描述: IC FLASH 1MBIT 20MHZ 14TSSOP
标准包装: 96
格式 - 存储器: 闪存
存储器类型: DataFLASH
存储容量: 1M(512 页 x 264 字节)
速度: 20MHz
接口: SPI 3 线串行
电源电压: 2.7 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 14-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 14-TSSOP
包装: 管件
layout, increases system reliability, minimizes switching noise, and reduces package size and
active pin count. The device is optimized for use in many commercial and industrial applica-
tions where high density, low pin count, low voltage, and low power are essential. The device
operates at clock frequencies up to 20 MHz with a typical active read current consumption of
4 mA.
To allow for simple in-system reprogrammability, the AT45DB011B does not require high input
voltages for programming. The device operates from a single power supply, 2.7V to 3.6V, for
both the program and read operations. The AT45DB011B is enabled through the chip select
pin (CS) and accessed via a three-wire interface consisting of the Serial Input (SI), Serial Out-
put (SO), and the Serial Clock (SCK).
All programming cycles are self-timed, and no separate erase cycle is required before
programming.
When the device is shipped from Atmel, the most significant page of the memory array may
not be erased. In other words, the contents of the last page may not be filled with FFH.
Block Diagram
WP
FLASH MEMORY ARRAY
PAGE (264 BYTES)
BUFFER (264 BYTES)
SCK
CS
RESET
VCC
GND
I/O INTERFACE
RDY/BUSY
SI
SO
Memory Array
To provide optimal flexibility, the memory array of the AT45DB011B is divided into three levels
of granularity comprising of sectors, blocks, and pages. The Memory Architecture Diagram
illustrates the breakdown of each level and details the number of pages per sector and block.
All program operations to the DataFlash occur on a page by page basis; however, the optional
erase operations can be performed at the block or page level.
2
AT45DB011B
1984J–DFLASH–06/06
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