参数资料
| 型号： | AT80C51RA2-SLSUL |
| 厂商： | Atmel |
| 文件页数： | 75/84页 |
| 文件大小： | 0K |
| 描述： | IC 8051 MCU ROMLESS 44PLCC |
| 标准包装： | 972 |
| 系列： | 80C |
| 核心处理器： | 8051 |
| 芯体尺寸： | 8-位 |
| 速度： | 30/20MHz |
| 连通性： | UART/USART |
| 外围设备： | POR，PWM，WDT |
| 输入/输出数： | 32 |
| 程序存储器类型： | ROMless |
| RAM 容量： | 512 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 44-LCC（J 形引线） |
| 包装： | 管件 |
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2007-2012 Microchip Technology Inc.
DS70292G-page 79
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
6.2
Reset Control Registers
REGISTER 6-1:
RCON: RESET CONTROL REGISTER(1)
R/W-0
U-0
R/W-0
TRAPR
IOPUWR
—
—CM
VREGS
bit 15
bit 8
R/W-0
R/W-1
EXTR
SWR
SWDTEN(2)
WDTO
SLEEP
IDLE
BOR
POR
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
TRAPR: Trap Reset Flag bit
1 = A Trap Conflict Reset has occurred
0 = A Trap Conflict Reset has not occurred
bit 14
IOPUWR: Illegal Opcode or Uninitialized W Access Reset Flag bit
1 = An illegal opcode detection, an illegal address mode or uninitialized W register used as an
Address Pointer caused a Reset
0 = An illegal opcode or uninitialized W Reset has not occurred
bit 13-10
Unimplemented: Read as ‘0’
bit 9
CM: Configuration Mismatch Flag bit
1 = A configuration mismatch Reset has occurred
0 = A configuration mismatch Reset has not occurred
bit 8
VREGS: Voltage Regulator Standby During Sleep bit
1 = Voltage regulator is active during Sleep
0 = Voltage regulator goes into Standby mode during Sleep
bit 7
EXTR: External Reset (MCLR) Pin bit
1 = A Master Clear (pin) Reset has occurred
0 = A Master Clear (pin) Reset has not occurred
bit 6
SWR: Software Reset (Instruction) Flag bit
1 = A RESET instruction has been executed
0 = A RESET instruction has not been executed
bit 5
SWDTEN: Software Enable/Disable of WDT bit(2)
1 = WDT is enabled
0 = WDT is disabled
bit 4
WDTO: Watchdog Timer Time-out Flag bit
1 = WDT time-out has occurred
0 = WDT time-out has not occurred
bit 3
SLEEP: Wake-up from Sleep Flag bit
1 = Device has been in Sleep mode
0 = Device has not been in Sleep mode
bit 2
IDLE: Wake-up from Idle Flag bit
1 = Device was in Idle mode
0 = Device was not in Idle mode
Note 1: All of the Reset status bits can be set or cleared in software. Setting one of these bits in software does not
cause a device Reset.
2: If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
SWDTEN bit setting.
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| AT80C51RA2-RLTUL | IC 8051 MCU ROMLESS 44VQFP |
| AT80C51RA2-3CSUM | IC 8051 MCU ROMLESS 40DIP |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| AT80C51RA2-SLSUM | 功能描述:8位微控制器 -MCU RLESS RA 40MHZ 5V RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| AT80C51RB2-3CSCM | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:80C51 High Performance ROM 8-bit Microcontroller |
| AT80C51RB2-3CSIM | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:80C51 High Performance ROM 8-bit Microcontroller |
| AT80C51RB2-3CSUM | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:80C51 High Performance ROM 8-bit Microcontroller |
| AT80C51RB2-RLTIL | 制造商:ATMEL 制造商全称:ATMEL Corporation 功能描述:80C51 High Performance ROM 8-bit Microcontroller |
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