参数资料
型号: AT88SA100S-SH-T
厂商: Atmel
文件页数: 5/23页
文件大小: 0K
描述: IC BATTERY AUTHENTICATION 8SOIC
产品培训模块: CryptoAuthentication™ Introduction
标准包装: 1
系列: CryptoAuthentication™
功能: 电池验证
电源电压: 2.7 V ~ 5.25 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 标准包装
其它名称: AT88SA100S-SH-TDKR

2.
IO Protocol
Communications to and from the AT88SA100S take place over a single asynchronously timed wire uses a pulse count
scheme. The overall communications structure is a hierarchy:
Table 2-1.
Tokens
Flags
Blocks
Packets
IO Hierarchy
Implement a single data bit transmitted on the bus, or the wake-up event.
Comprised of eight tokens (bits) which convey the direction and meaning of the next group of bits (if any)
which may be transmitted.
of data follow the command and Transmit flags. They incorporate both a byte count and a checksum to ensure
proper data transmission.
of bytes form the core of the block without the count and CRC. They are either the input or output parameters
of an Atmel AT88SA100S chip command or status information from the AT88SA100S chip.
2.1
IO Tokens
There are a number of IO tokens that may be transmitted along the bus:
Input: (To AT88SA100S)
Wake
Zero
One
Wake AT88SA100S up from sleep (low power) state
Send a single bit from system to the AT88SA100S with a value of zero
Send a single bit from system to the AT88SA100S with a value of one
Output: (From AT88SA100S)
ZeroOut
OneOut
Send a single bit from the AT88SA100S to the system with a value of zero
Send a single bit from the AT88SA100S to the system with a value of one
The waveforms are the same in either direction, however there are some differences in timing based on the expectation that
the host has a very accurate and consistent clock while the AT88SA100S has significant variation in its internal clock
generator due to normal manufacturing and environmental fluctuations.
The bit timings are designed to permit a standard UART running at 230.4 K baud to transmit and receive the tokens efficiently.
Each byte transmitted or received by the UART corresponds to a single bit received or transmitted by the AT88SA100S. Refer
to applications notes on the Atmel website for more details describing how the UART should be controlled.
5
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