参数资料
型号: AT88SA100S-SH-T
厂商: Atmel
文件页数: 8/23页
文件大小: 0K
描述: IC BATTERY AUTHENTICATION 8SOIC
产品培训模块: CryptoAuthentication™ Introduction
标准包装: 1
系列: CryptoAuthentication™
功能: 电池验证
电源电压: 2.7 V ~ 5.25 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 标准包装
其它名称: AT88SA100S-SH-TDKR

5.
DC Parameters
Table 5-1.
DC Parameters
Parameter
Operating temperature
Power supply voltage
Fuse burning voltage
Active power supply
Symbol
T A
V CC
V BURN
I CC
Min
-40
2.7
3.0
Typ
-
Max
85
5.25
5.25
6
Unit
°C
V
V
mA
Notes
Voltage applied to V CC pin. See Section 6.3.
current
Sleep Power Supply
I SLEEP
150
nA
When chip is in sleep mode, V CC = 5.25 V,
Current @ -40 to 55 C
Vsig = 0.0 to 0.3 V, or
Vsig = V CC -0.3 V to V CC
Sleep power supply
I SLEEP
1
μ A
When chip is in sleep mode, V CC = 5.25 V,
current @ 85 c
Vsig = 0.0 to 0.3 V, or
Vsig = V CC -0.3 V to V cc
Input low voltage @
V IL
-0.5
0.75
V
Voltage levels for Wake token when chip is in
V CC = 5.25 v
sleep mode.
Input low voltage @
V IL
-0.5
0.5
V
Voltage levels for Wake token when chip is in
V CC = 2.7 v
sleep mode.
Input high voltage @
V IH
1.5
5.25
V
Voltage levels for Wake token when chip is in
V CC = 5.25 v
sleep mode.
Input high voltage @
V IH
1.25
3.0
V
Voltage levels for Wake token when chip is in
V CC = 2.7 v
sleep mode.
Input low voltage when
V IL
-0.5
0.5
V
When chip is in active mode,
active
V CC = 2.7 – 5.25 V
Input high voltage when
V IH
1.2
5.25
V
When chip is in active mode,
active
V CC = 2.7 – 5.25 V
Output low voltage
V OL
0.4
V
When chip is in active mode,
V CC = 2.7 – 5.25 V
5.1
Maximum input voltage
IO Flags
V MAX
5.25
V
The host system is always the bus master, so before any IO transaction, the system must first send an 8-bit fla g to the chip to
indicate the IO operation that is to be performed, as follows:
Value
0x77
0x88
0xCC
Name
Command
Transmit
Sleep
Meaning
After this flag, the system starts sending a command block to the chip. The first bit of the block can
follow immediately after the last bit of the flag.
After a turn-around delay, the chip will start transmitting the response for a previously transmitted
command block.
Upon receipt of a sleep flag, the chip will enter a low power mode until the next Wake token is
received.
All other values are reserved and will be ignored.
8
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