参数资料
型号: AT88SA100S-SH-T
厂商: Atmel
文件页数: 9/23页
文件大小: 0K
描述: IC BATTERY AUTHENTICATION 8SOIC
产品培训模块: CryptoAuthentication™ Introduction
标准包装: 1
系列: CryptoAuthentication™
功能: 电池验证
电源电压: 2.7 V ~ 5.25 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 标准包装
其它名称: AT88SA100S-SH-TDKR
5.1.1
Command Timing
After a command flag is transmitted, a command block should be sent to the chip. During parsing of the parameters and
subsequent execution of a properly received command, the chip will be busy and not respond to transitions on the signal pin.
The delays for these operations are listed in the table below:
Table 5-2.
Command Timing (Guaranteed by design; not tested)
Parameter
ParsingDelay
Symbol
t PARSE
Max
100
Unit
μ s
Notes
Delay to check CRC and parse opcode and parameters before an
error indication will be available.
MemoryDelay
FuseDelay
t EXEC_MEM
t EXEC_FUSE
3
700
ms
μ s
Delay to execute Read, Write and/or SramLock commands.
Delay to execute BurnFuse command.
See Section 6.3 for more details.
MacDelay
PersonalizeDelay
t EXEC_MAC
t PERSON
30
13
ms
ms
Delay to execute MAC command.
Delay to execute GenPersonalizationKey or LoadSram.
In this document, t EXEC is used as shorthand for the delay corresponding to whatever command has been sent to the chip.
5.1.2
Transmit Flag
The Transmit flag is used to turn around the signal so that the AT88SA100S can send data back to the system, depending on
its current state. The bytes that the AT88SA100S returns to the system, depending on its current state as follows:
Table 5-3.
Return Codes
State Description
After Wake, but prior
to first command
After successful
command execution
Execution error
After CRC or other
parsing error
Error/Status
0x11
0x0F
0xFF
Description
Indication that a proper Wake token has been received by the AT88SA100S.
Return bytes per “Output Parameters” in Section 6, Commands of this document.
In some cases this is a single byte with a value of 0x00 indicating success. The
Transmit flag can be resent to the AT88SA100S repeatedly if a re-read of the
output is necessary.
Command was properly received but could not be executed by the AT88SA100S
chip. Changes in the AT88SA100S chip state or the value of the command bits
must happen before it is re-attempted.
Command was not properly received by AT88SA100S and should be re-issued
by the system.
The AT88SA100S always transmits complete blocks to the system, so in the above table the status/error bytes result in 4-
bytes going to the system – count, error, CRC x 2.
After receipt of a command block, the AT88SA100S will parse the command for errors, a process which takes t PARSE (See
Section 5.1.1). After this interval the system can send a transmit token to the AT88SA100S – if there was an error then the
AT88SA100S will respond with an error code. If there is no error then the AT88SA100S internally transitions automatically
from t PARSE to t EXEC and will not respond to any Transmit tokens until both delays are complete.
5.1.3
Sleep Flag
The sleep flag is used to transition the AT88SA100S to the low power state, which causes a complete reset of the
AT88SA100S’ internal command engine and input/output buffer. It can be sent to the AT88SA100S at any time when the
AT88SA100S will accept a flag.
9
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